Puyan Lotfi f5b7a46837 [llvm][MIRVRegNamerUtils] Adding hashing on memoperands. ...

No more hash collisions for memoperands. Now the MIRCanonicalization
pass shouldn't hit hash collisions when dealing with nearly identical
memory accessing instructions when their memoperands are in fact different.

Differential Revision: https://reviews.llvm.org/D71328

2019-12-11 22:11:49 -05:00

..

expected-target-index-name.mir

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00

intrinsics.mir

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invalid-target-index-operand.mir

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00

lit.local.cfg

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load-store-opt-dlc.mir

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00

machine-function-info-no-ir.mir

AMDGPU: Add default denormal mode to MachineFunctionInfo

2019-11-01 00:03:39 -07:00

machine-function-info-register-parse-error1.mir

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machine-function-info-register-parse-error2.mir

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machine-function-info.ll

AMDGPU: Add default denormal mode to MachineFunctionInfo

2019-11-01 00:03:39 -07:00

mfi-frame-offset-reg-class.mir

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mfi-parse-error-frame-offset-reg.mir

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mfi-parse-error-scratch-rsrc-reg.mir

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mfi-parse-error-scratch-wave-offset-reg.mir

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mfi-parse-error-stack-ptr-offset-reg.mir

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mfi-scratch-rsrc-reg-reg-class.mir

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mfi-scratch-wave-offset-reg-class.mir

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mfi-stack-ptr-offset-reg-class.mir

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mir-canon-multi.mir

[MIRNamer]: Make the check lines in the test robust with regex.

2019-11-16 22:58:45 -08:00

mircanon-memoperands.mir

[llvm][MIRVRegNamerUtils] Adding hashing on memoperands.

2019-12-11 22:11:49 -05:00

parse-order-reserved-regs.mir

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00

stack-id.mir

Describe stack-id as an enum

2019-06-17 09:13:29 +00:00

syncscopes.mir

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

target-flags.mir

AMDGPU: Prepare for explicit absolute relocations in code generation

2019-06-16 17:43:37 +00:00

target-index-operands.mir

[AMDGPU] Extend buffer intrinsics with swizzling

2019-10-02 17:22:36 +00:00