Simon Dardis 51a7ae2a29 [mips] Place certain 64 bit FPU instructions in their own decoder namespace ...

Previously, instructions that were defined to use the FGR64 register class
were associated with the Mips64 table which was incorrect.

Reviewers: nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D38454

llvm-svn: 314976

2017-10-05 10:27:37 +00:00

..

CMakeLists.txt

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LLVMBuild.txt

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MipsDisassembler.cpp

[mips] Place certain 64 bit FPU instructions in their own decoder namespace

2017-10-05 10:27:37 +00:00