Matt Arsenault 36b4b0bed7 AMDGPU: Remove -mcpu=SI ...

Leftover from before amdgcn/r600 split.

llvm-svn: 310277

2017-08-07 18:30:35 +00:00

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amdgpu-irtranslator.ll

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inst-select-load-flat.mir

AMDGPU: Start adding offset fields to flat instructions

2017-06-12 15:55:58 +00:00

inst-select-load-smrd.mir

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inst-select-store-flat.mir

AMDGPU: Start adding offset fields to flat instructions

2017-06-12 15:55:58 +00:00

irtranslator-amdgpu_vs.ll

AMDGPU/GlobalISel: Add support for amdgpu_vs calling convention

2017-08-01 12:38:33 +00:00

legalize-add.mir

AMDGPU/GlobalISel: Mark 32-bit G_ADD as legal

2017-06-12 20:54:56 +00:00

legalize-and.mir

AMDGPU/GlobalISel: Mark 32-bit G_AND as legal

2017-06-23 15:17:17 +00:00

legalize-bitcast.mir

AMDGPU/GlobalISel: Mark G_BITCAST s32 <--> <2 x s16> legal

2017-06-19 13:15:45 +00:00

legalize-constant.mir

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legalize-fmul.mir

AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal

2017-08-02 22:56:30 +00:00

legalize-icmp.mir

AMDGPU/GlobalISel: Mark 32-bit G_ICMP as legal

2017-06-06 14:16:50 +00:00

legalize-or.mir

AMDGPU/GlobalISel: Mark 32-bit G_OR as legal

2017-07-26 20:00:53 +00:00

legalize-select.mir

AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal

2017-06-07 13:54:51 +00:00

legalize-shl.mir

AMDGPU/GlobalISel: Mark 32-bit G_SHL as legal

2017-06-26 15:56:52 +00:00

lit.local.cfg

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regbankselect.mir

[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.

2017-06-06 08:16:19 +00:00

shader-epilogs.ll

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smrd.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00