951a284fdf
Support HLSL SV_GroupThreadId attribute. For `directx` target, translate it into `dx.thread.id.in.group` in clang codeGen and lower `dx.thread.id.in.group` to `dx.op.threadIdInGroup` in LLVM DirectX backend. For `spir-v` target, translate it into `spv.thread.id.in.group` in clang codeGen and lower `spv.thread.id.in.group` to a `LocalInvocationId` builtin variable in LLVM SPIR-V backend. Fixes: #70122
77 lines
3.4 KiB
HLSL
77 lines
3.4 KiB
HLSL
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -finclude-default-header -ast-dump -o - %s | FileCheck %s
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[numthreads(8,8,1)]
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void CSMain(uint ID : SV_DispatchThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain 'void (uint)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:18 ID 'uint'
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// CHECK-NEXT: HLSLSV_DispatchThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain1(uint2 ID : SV_DispatchThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain1 'void (uint2)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:20 ID 'uint2'
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// CHECK-NEXT: HLSLSV_DispatchThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain2(uint3 ID : SV_DispatchThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain2 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:20 ID 'uint3'
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// CHECK-NEXT: HLSLSV_DispatchThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain3(uint3 : SV_DispatchThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain3 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:20 'uint3'
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// CHECK-NEXT: HLSLSV_DispatchThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain_GID(uint ID : SV_GroupID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain_GID 'void (uint)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:22 ID 'uint'
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// CHECK-NEXT: HLSLSV_GroupIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain1_GID(uint2 ID : SV_GroupID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain1_GID 'void (uint2)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:24 ID 'uint2'
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// CHECK-NEXT: HLSLSV_GroupIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain2_GID(uint3 ID : SV_GroupID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain2_GID 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:24 ID 'uint3'
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// CHECK-NEXT: HLSLSV_GroupIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain3_GID(uint3 : SV_GroupID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain3_GID 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:24 'uint3'
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// CHECK-NEXT: HLSLSV_GroupIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain_GThreadID(uint ID : SV_GroupThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain_GThreadID 'void (uint)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:28 ID 'uint'
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// CHECK-NEXT: HLSLSV_GroupThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain1_GThreadID(uint2 ID : SV_GroupThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain1_GThreadID 'void (uint2)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:30 ID 'uint2'
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// CHECK-NEXT: HLSLSV_GroupThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain2_GThreadID(uint3 ID : SV_GroupThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain2_GThreadID 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:30 ID 'uint3'
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// CHECK-NEXT: HLSLSV_GroupThreadIDAttr
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}
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[numthreads(8,8,1)]
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void CSMain3_GThreadID(uint3 : SV_GroupThreadID) {
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// CHECK: FunctionDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> line:[[@LINE-1]]:6 CSMain3_GThreadID 'void (uint3)'
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// CHECK-NEXT: ParmVarDecl 0x{{[0-9a-fA-F]+}} <{{.*}}> col:30 'uint3'
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// CHECK-NEXT: HLSLSV_GroupThreadIDAttr
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}
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