1789534ac1
Selects that choose between two constants will be less profitable to turn into branches, especially if the constants can be folded somehow into the surrounding instructions. They will also be cost modelled in a way that can make them over-optimistically converted to branches, as neither branch will have a latency depth but the constants still need to be materialized. This patch disabled selectopt for selects with two constant branches. It is currently in the target independent part, as it sounds generic, but I could move it into AArch64 if needed.
73 lines
2.9 KiB
LLVM
73 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -O3 < %s | FileCheck %s
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define i32 @test_const(ptr %in1, ptr %in2, ptr %out, i32 %n, ptr %tbl) {
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; CHECK-LABEL: test_const:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: cmp w3, #1
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; CHECK-NEXT: b.lt .LBB0_3
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; CHECK-NEXT: // %bb.1: // %for.body.preheader
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; CHECK-NEXT: mov w9, #1267 // =0x4f3
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; CHECK-NEXT: fmov s1, #1.00000000
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; CHECK-NEXT: fmov d2, #5.00000000
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; CHECK-NEXT: mov w8, w3
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; CHECK-NEXT: movk w9, #16309, lsl #16
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; CHECK-NEXT: fmov s0, w9
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; CHECK-NEXT: .p2align 5, , 16
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; CHECK-NEXT: .LBB0_2: // %for.body
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldr s4, [x1], #4
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; CHECK-NEXT: ldr w9, [x0], #4
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; CHECK-NEXT: add w9, w9, #10
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; CHECK-NEXT: scvtf d3, w9
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; CHECK-NEXT: fmadd s4, s4, s0, s1
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; CHECK-NEXT: fabs s4, s4
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; CHECK-NEXT: fcvt d4, s4
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; CHECK-NEXT: fdiv d3, d3, d4
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; CHECK-NEXT: fcmp d3, d2
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; CHECK-NEXT: cset w9, lt
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; CHECK-NEXT: subs x8, x8, #1
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; CHECK-NEXT: ubfiz x9, x9, #4, #32
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; CHECK-NEXT: ldr s3, [x4, x9]
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; CHECK-NEXT: fcvtzs w9, s3
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; CHECK-NEXT: str w9, [x2], #4
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; CHECK-NEXT: b.ne .LBB0_2
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; CHECK-NEXT: .LBB0_3: // %for.cond.cleanup
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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entry:
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%cmp15 = icmp sgt i32 %n, 0
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br i1 %cmp15, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext nneg i32 %n to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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ret i32 0
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32, ptr %in1, i64 %indvars.iv
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%0 = load i32, ptr %arrayidx, align 4
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%add = add nsw i32 %0, 10
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%conv = sitofp i32 %add to double
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%arrayidx2 = getelementptr inbounds float, ptr %in2, i64 %indvars.iv
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%1 = load float, ptr %arrayidx2, align 4
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%mul = fmul fast float %1, 0x3FF6A09E60000000
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%add3 = fadd fast float %mul, 1.000000e+00
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%2 = tail call fast float @llvm.fabs.f32(float %add3)
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%3 = fpext float %2 to double
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%div = fdiv fast double %conv, %3
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%cmp5 = fcmp fast olt double %div, 5.000000e+00
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%idxprom6 = select i1 %cmp5, i64 4, i64 0
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%arrayidx7 = getelementptr inbounds float, ptr %tbl, i64 %idxprom6
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%4 = load float, ptr %arrayidx7, align 4
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%conv8 = fptosi float %4 to i32
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%arrayidx10 = getelementptr inbounds i32, ptr %out, i64 %indvars.iv
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store i32 %conv8, ptr %arrayidx10, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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