9ef1d37ffb
Similar to 806761a762
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple, leaving a target triple which
may not make sense.
Therefore, -march= is error-prone and not recommended for tests without a target
triple. The issue has been benign as we recognize avr-apple-darwin as ELF instead
of rejecting it outrightly.
82 lines
1.7 KiB
LLVM
82 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=avr | FileCheck %s
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define i8 @and8_reg_reg(i8 %a, i8 %b) {
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; CHECK-LABEL: and8_reg_reg:
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; CHECK: and r24, r22
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%result = and i8 %a, %b
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ret i8 %result
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}
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define i8 @and8_reg_imm(i8 %a) {
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; CHECK-LABEL: and8_reg_imm:
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; CHECK: andi r24, 5
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%result = and i8 %a, 5
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ret i8 %result
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}
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define i16 @and16_reg_reg(i16 %a, i16 %b) {
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; CHECK-LABEL: and16_reg_reg:
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; CHECK: and r24, r22
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; CHECK: and r25, r23
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%result = and i16 %a, %b
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ret i16 %result
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}
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define i16 @and16_reg_imm(i16 %a) {
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; CHECK-LABEL: and16_reg_imm:
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; CHECK: andi r24, 210
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; CHECK: andi r25, 4
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%result = and i16 %a, 1234
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ret i16 %result
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}
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define i32 @and32_reg_reg(i32 %a, i32 %b) {
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; CHECK-LABEL: and32_reg_reg:
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; CHECK: and r22, r18
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; CHECK: and r23, r19
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; CHECK: and r24, r20
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; CHECK: and r25, r21
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%result = and i32 %a, %b
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ret i32 %result
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}
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define i32 @and32_reg_imm(i32 %a) {
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; CHECK-LABEL: and32_reg_imm:
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; CHECK: andi r22, 21
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; CHECK: andi r23, 205
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; CHECK: andi r24, 91
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; CHECK: andi r25, 7
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%result = and i32 %a, 123456789
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ret i32 %result
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}
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define i64 @and64_reg_reg(i64 %a, i64 %b) {
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; CHECK-LABEL: and64_reg_reg:
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; CHECK: and r18, r10
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; CHECK: and r19, r11
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; CHECK: and r20, r12
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; CHECK: and r21, r13
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; CHECK: and r22, r14
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; CHECK: and r23, r15
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; CHECK: and r24, r16
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; CHECK: and r25, r17
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%result = and i64 %a, %b
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ret i64 %result
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}
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define i64 @and64_reg_imm(i64 %a) {
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; CHECK-LABEL: and64_reg_imm:
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; CHECK: andi r18, 253
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; Per PR 31345, we optimize away ANDI Rd, 0xff
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; CHECK-NOT: andi r19, 255
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; CHECK: andi r20, 155
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; CHECK: andi r21, 88
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; CHECK: andi r22, 76
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; CHECK: andi r23, 73
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; CHECK: andi r24, 31
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; CHECK: andi r25, 242
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%result = and i64 %a, 17446744073709551613
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ret i64 %result
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}
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