4f48abff0f
Closes https://github.com/llvm/llvm-project/issues/99116 Implements `firstbitlow` by extracting common functionality from `firstbithigh` into a shared function while also fixing a bug for an edge case where `u64x3` and larger vectors will attempt to create vectors larger than the SPRIV max of 4. --------- Co-authored-by: Steven Perron <stevenperron@google.com>
48 lines
2.0 KiB
LLVM
48 lines
2.0 KiB
LLVM
; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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; Make sure dxil operation function calls for firstbitlow are generated for all integer types.
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define noundef i32 @test_firstbitlow_short(i16 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i16(i32 32, i16 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i16(i16 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef i32 @test_firstbitlow_int(i32 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i32(i32 32, i32 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i32(i32 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef i32 @test_firstbitlow_long(i64 noundef %a) {
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entry:
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; CHECK: call i32 @dx.op.unaryBits.i64(i32 32, i64 %{{.*}})
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%elt.firstbitlow = call i32 @llvm.dx.firstbitlow.i64(i64 %a)
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ret i32 %elt.firstbitlow
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}
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define noundef <4 x i32> @test_firstbitlow_vec4_i32(<4 x i32> noundef %a) {
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entry:
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; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
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; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee0]])
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; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
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; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee1]])
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; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
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; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee2]])
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; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
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; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i32(i32 32, i32 [[ee3]])
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; CHECK: insertelement <4 x i32> poison, i32 [[ie0]], i64 0
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; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie1]], i64 1
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; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie2]], i64 2
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; CHECK: insertelement <4 x i32> %{{.*}}, i32 [[ie3]], i64 3
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%2 = call <4 x i32> @llvm.dx.firstbitlow.v4i32(<4 x i32> %a)
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ret <4 x i32> %2
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}
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declare i32 @llvm.dx.firstbitlow.i16(i16)
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declare i32 @llvm.dx.firstbitlow.i32(i32)
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declare i32 @llvm.dx.firstbitlow.i64(i64)
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declare <4 x i32> @llvm.dx.firstbitlow.v4i32(<4 x i32>)
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