b6c0f1bfa7
This is an alternative to #117866 that works by demanding a valid vtype instead of using a separate pass. The main advantage of this is that it allows coalesceVSETVLIs to just reuse an existing vsetvli later in the block. To do this we need to first transfer the vsetvli info to some arbitrary valid state in transferBefore when we encounter a vector copy. Then we add a new vill demanded field that will happily accept any other known vtype, which allows us to coalesce these where possible. Note we also need to check for vector copies in computeVLVTYPEChanges, otherwise the pass will completely skip over functions that only have vector copies and nothing else. This is one part of a fix for #114518. We still need to check if there's other cases where vector copies/whole register moves that are inserted after vsetvli insertion.
185 lines
8.0 KiB
LLVM
185 lines
8.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+m,+v < %s | FileCheck %s --check-prefixes=CHECK,RV32
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; RUN: llc -mtriple=riscv64 -mattr=+m,+v < %s | FileCheck %s --check-prefixes=CHECK,RV64
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; Check that we correctly scale the split part indirect offsets by VSCALE.
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define <vscale x 32 x i32> @callee_scalable_vector_split_indirect(<vscale x 32 x i32> %x, <vscale x 32 x i32> %y) {
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; CHECK-LABEL: callee_scalable_vector_split_indirect:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: slli a1, a1, 3
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; CHECK-NEXT: add a1, a0, a1
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; CHECK-NEXT: vl8re32.v v24, (a0)
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; CHECK-NEXT: vl8re32.v v0, (a1)
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; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v24
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; CHECK-NEXT: vadd.vv v16, v16, v0
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; CHECK-NEXT: ret
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%a = add <vscale x 32 x i32> %x, %y
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ret <vscale x 32 x i32> %a
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}
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; Call the function above. Check that we set the arguments correctly.
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define <vscale x 32 x i32> @caller_scalable_vector_split_indirect(<vscale x 32 x i32> %x) {
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; RV32-LABEL: caller_scalable_vector_split_indirect:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -144
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; RV32-NEXT: .cfi_def_cfa_offset 144
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; RV32-NEXT: sw ra, 140(sp) # 4-byte Folded Spill
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; RV32-NEXT: sw s0, 136(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: .cfi_offset s0, -8
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; RV32-NEXT: addi s0, sp, 144
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; RV32-NEXT: .cfi_def_cfa s0, 0
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; RV32-NEXT: csrr a0, vlenb
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; RV32-NEXT: slli a0, a0, 4
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; RV32-NEXT: sub sp, sp, a0
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; RV32-NEXT: andi sp, sp, -128
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; RV32-NEXT: addi a0, sp, 128
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; RV32-NEXT: csrr a1, vlenb
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; RV32-NEXT: vs8r.v v8, (a0)
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; RV32-NEXT: vsetvli a2, zero, e32, m8, ta, ma
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; RV32-NEXT: vmv.v.i v8, 0
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; RV32-NEXT: slli a1, a1, 3
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; RV32-NEXT: add a1, a0, a1
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; RV32-NEXT: addi a0, sp, 128
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; RV32-NEXT: vs8r.v v16, (a1)
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; RV32-NEXT: vmv.v.i v16, 0
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; RV32-NEXT: call callee_scalable_vector_split_indirect
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; RV32-NEXT: addi sp, s0, -144
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; RV32-NEXT: .cfi_def_cfa sp, 144
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; RV32-NEXT: lw ra, 140(sp) # 4-byte Folded Reload
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; RV32-NEXT: lw s0, 136(sp) # 4-byte Folded Reload
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; RV32-NEXT: .cfi_restore ra
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; RV32-NEXT: .cfi_restore s0
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; RV32-NEXT: addi sp, sp, 144
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; RV32-NEXT: .cfi_def_cfa_offset 0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: caller_scalable_vector_split_indirect:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -144
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; RV64-NEXT: .cfi_def_cfa_offset 144
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; RV64-NEXT: sd ra, 136(sp) # 8-byte Folded Spill
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; RV64-NEXT: sd s0, 128(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: .cfi_offset s0, -16
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; RV64-NEXT: addi s0, sp, 144
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; RV64-NEXT: .cfi_def_cfa s0, 0
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; RV64-NEXT: csrr a0, vlenb
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; RV64-NEXT: slli a0, a0, 4
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; RV64-NEXT: sub sp, sp, a0
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; RV64-NEXT: andi sp, sp, -128
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; RV64-NEXT: addi a0, sp, 128
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; RV64-NEXT: csrr a1, vlenb
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; RV64-NEXT: vs8r.v v8, (a0)
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; RV64-NEXT: vsetvli a2, zero, e32, m8, ta, ma
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; RV64-NEXT: vmv.v.i v8, 0
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; RV64-NEXT: slli a1, a1, 3
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; RV64-NEXT: add a1, a0, a1
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; RV64-NEXT: addi a0, sp, 128
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; RV64-NEXT: vs8r.v v16, (a1)
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; RV64-NEXT: vmv.v.i v16, 0
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; RV64-NEXT: call callee_scalable_vector_split_indirect
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; RV64-NEXT: addi sp, s0, -144
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; RV64-NEXT: .cfi_def_cfa sp, 144
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; RV64-NEXT: ld ra, 136(sp) # 8-byte Folded Reload
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; RV64-NEXT: ld s0, 128(sp) # 8-byte Folded Reload
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; RV64-NEXT: .cfi_restore ra
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; RV64-NEXT: .cfi_restore s0
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; RV64-NEXT: addi sp, sp, 144
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; RV64-NEXT: .cfi_def_cfa_offset 0
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; RV64-NEXT: ret
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%c = alloca i64
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%a = call <vscale x 32 x i32> @callee_scalable_vector_split_indirect(<vscale x 32 x i32> zeroinitializer, <vscale x 32 x i32> %x)
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ret <vscale x 32 x i32> %a
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}
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define target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @caller_tuple_return() {
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; RV32-LABEL: caller_tuple_return:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -16
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; RV32-NEXT: .cfi_def_cfa_offset 16
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; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: call callee_tuple_return
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; RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; RV32-NEXT: vmv2r.v v6, v8
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; RV32-NEXT: vmv2r.v v8, v10
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; RV32-NEXT: vmv2r.v v10, v6
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; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: .cfi_restore ra
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: .cfi_def_cfa_offset 0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: caller_tuple_return:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -16
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; RV64-NEXT: .cfi_def_cfa_offset 16
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; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: call callee_tuple_return
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; RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; RV64-NEXT: vmv2r.v v6, v8
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; RV64-NEXT: vmv2r.v v8, v10
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; RV64-NEXT: vmv2r.v v10, v6
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; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64-NEXT: .cfi_restore ra
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; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: .cfi_def_cfa_offset 0
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; RV64-NEXT: ret
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%a = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @callee_tuple_return()
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%b = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %a, i32 0)
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%c = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %a, i32 1)
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%d = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison, <vscale x 4 x i32> %c, i32 0)
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%e = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %d, <vscale x 4 x i32> %b, i32 1)
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ret target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %e
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}
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declare target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @callee_tuple_return()
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define void @caller_tuple_argument(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %x) {
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; RV32-LABEL: caller_tuple_argument:
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; RV32: # %bb.0:
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; RV32-NEXT: addi sp, sp, -16
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; RV32-NEXT: .cfi_def_cfa_offset 16
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; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32-NEXT: .cfi_offset ra, -4
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; RV32-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; RV32-NEXT: vmv2r.v v6, v8
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; RV32-NEXT: vmv2r.v v8, v10
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; RV32-NEXT: vmv2r.v v10, v6
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; RV32-NEXT: call callee_tuple_argument
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; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32-NEXT: .cfi_restore ra
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; RV32-NEXT: addi sp, sp, 16
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; RV32-NEXT: .cfi_def_cfa_offset 0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: caller_tuple_argument:
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; RV64: # %bb.0:
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; RV64-NEXT: addi sp, sp, -16
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; RV64-NEXT: .cfi_def_cfa_offset 16
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; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64-NEXT: .cfi_offset ra, -8
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; RV64-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; RV64-NEXT: vmv2r.v v6, v8
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; RV64-NEXT: vmv2r.v v8, v10
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; RV64-NEXT: vmv2r.v v10, v6
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; RV64-NEXT: call callee_tuple_argument
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; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; RV64-NEXT: .cfi_restore ra
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; RV64-NEXT: addi sp, sp, 16
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; RV64-NEXT: .cfi_def_cfa_offset 0
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; RV64-NEXT: ret
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%a = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %x, i32 0)
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%b = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_2t(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %x, i32 1)
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%c = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) poison, <vscale x 4 x i32> %b, i32 0)
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%d = call target("riscv.vector.tuple", <vscale x 16 x i8>, 2) @llvm.riscv.tuple.insert.triscv.vector.tuple_nxv16i8_2t.nxv4i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %c, <vscale x 4 x i32> %a, i32 1)
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call void @callee_tuple_argument(target("riscv.vector.tuple", <vscale x 16 x i8>, 2) %d)
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ret void
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}
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declare void @callee_tuple_argument(target("riscv.vector.tuple", <vscale x 16 x i8>, 2))
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