8424bf207e
This patch adds support for the next-generation arch15 CPU architecture to the SystemZ backend. This includes: - Basic support for the new processor and its features. - Detection of arch15 as host processor. - Assembler/disassembler support for new instructions. - Exploitation of new instructions for code generation. - New vector (signed|unsigned|bool) __int128 data types. - New LLVM intrinsics for certain new instructions. - Support for low-level builtins mapped to new LLVM intrinsics. - New high-level intrinsics in vecintrin.h. - Indicate support by defining __VEC__ == 10305. Note: No currently available Z system supports the arch15 architecture. Once new systems become available, the official system name will be added as supported -march name.
25 lines
660 B
LLVM
25 lines
660 B
LLVM
; Test vector multiplication on arch15.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch15 | FileCheck %s
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; Test a v2i64 multiplication.
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define <2 x i64> @f1(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {
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; CHECK-LABEL: f1:
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; CHECK: vmlg %v24, %v26, %v28
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; CHECK: br %r14
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%ret = mul <2 x i64> %val1, %val2
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ret <2 x i64> %ret
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}
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; Test a v2i64 multiply-and-add.
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define <2 x i64> @f2(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2,
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<2 x i64> %val3) {
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; CHECK-LABEL: f2:
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; CHECK: vmalg %v24, %v26, %v28, %v30
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; CHECK: br %r14
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%mul = mul <2 x i64> %val1, %val2
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%ret = add <2 x i64> %mul, %val3
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ret <2 x i64> %ret
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}
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