e6bf48d110
As of revea222be0d, LLVMs assembler will actually try to honour the "fill value" part of p2align directives. X86 printed these as 0x90, which isn't actually what it wanted: we want multi-byte nops for .text padding. Compiling via a textual assembly file produces single-byte nop padding sinceea222be0dbut the built-in assembler will produce multi-byte nops. This divergent behaviour is undesirable. To fix: don't set the byte padding field for x86, which allows the assembler to pick multi-byte nops. Test that we get the same multi-byte padding when compiled via textual assembly or directly to object file. Added same-align-bytes-with-llasm-llobj.ll to that effect, updated numerous other tests to not contain check-lines for the explicit padding.
128 lines
4.0 KiB
LLVM
128 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; LSR should be able to eliminate both smax and umax expressions
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; in loop trip counts.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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define void @fs(ptr nocapture %p, i64 %n) nounwind {
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; CHECK-LABEL: fs:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %bb
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq $0, (%rdi,%rax,8)
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; CHECK-NEXT: incq %rax
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; CHECK-NEXT: cmpq %rsi, %rax
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; CHECK-NEXT: jl .LBB0_1
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; CHECK-NEXT: # %bb.2: # %return
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; CHECK-NEXT: retq
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entry:
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%tmp = icmp slt i64 %n, 1 ; <i1> [#uses=1]
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%smax = select i1 %tmp, i64 1, i64 %n ; <i64> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %entry
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%i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
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%scevgep = getelementptr double, ptr %p, i64 %i.0 ; <ptr> [#uses=1]
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store double 0.000000e+00, ptr %scevgep, align 8
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%0 = add i64 %i.0, 1 ; <i64> [#uses=2]
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%exitcond = icmp eq i64 %0, %smax ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @bs(ptr nocapture %p, i64 %n) nounwind {
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; CHECK-LABEL: bs:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB1_1: # %bb
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq $0, (%rdi,%rax,8)
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; CHECK-NEXT: incq %rax
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; CHECK-NEXT: cmpq %rsi, %rax
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; CHECK-NEXT: jl .LBB1_1
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; CHECK-NEXT: # %bb.2: # %return
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; CHECK-NEXT: retq
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entry:
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%tmp = icmp sge i64 %n, 1 ; <i1> [#uses=1]
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%smax = select i1 %tmp, i64 %n, i64 1 ; <i64> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %entry
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%i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
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%scevgep = getelementptr double, ptr %p, i64 %i.0 ; <ptr> [#uses=1]
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store double 0.000000e+00, ptr %scevgep, align 8
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%0 = add i64 %i.0, 1 ; <i64> [#uses=2]
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%exitcond = icmp eq i64 %0, %smax ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @fu(ptr nocapture %p, i64 %n) nounwind {
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; CHECK-LABEL: fu:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB2_1: # %bb
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq $0, (%rdi,%rax,8)
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; CHECK-NEXT: incq %rax
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; CHECK-NEXT: cmpq %rsi, %rax
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; CHECK-NEXT: jb .LBB2_1
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; CHECK-NEXT: # %bb.2: # %return
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; CHECK-NEXT: retq
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entry:
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%tmp = icmp eq i64 %n, 0 ; <i1> [#uses=1]
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%umax = select i1 %tmp, i64 1, i64 %n ; <i64> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %entry
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%i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
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%scevgep = getelementptr double, ptr %p, i64 %i.0 ; <ptr> [#uses=1]
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store double 0.000000e+00, ptr %scevgep, align 8
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%0 = add i64 %i.0, 1 ; <i64> [#uses=2]
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%exitcond = icmp eq i64 %0, %umax ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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define void @bu(ptr nocapture %p, i64 %n) nounwind {
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; CHECK-LABEL: bu:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB3_1: # %bb
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq $0, (%rdi,%rax,8)
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; CHECK-NEXT: incq %rax
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; CHECK-NEXT: cmpq %rsi, %rax
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; CHECK-NEXT: jb .LBB3_1
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; CHECK-NEXT: # %bb.2: # %return
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; CHECK-NEXT: retq
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entry:
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%tmp = icmp ne i64 %n, 0 ; <i1> [#uses=1]
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%umax = select i1 %tmp, i64 %n, i64 1 ; <i64> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %entry
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%i.0 = phi i64 [ 0, %entry ], [ %0, %bb ] ; <i64> [#uses=2]
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%scevgep = getelementptr double, ptr %p, i64 %i.0 ; <ptr> [#uses=1]
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store double 0.000000e+00, ptr %scevgep, align 8
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%0 = add i64 %i.0, 1 ; <i64> [#uses=2]
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%exitcond = icmp eq i64 %0, %umax ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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