094572701d
This patch makes the final major change of the RemoveDIs project, changing the default IR output from debug intrinsics to debug records. This is expected to break a large number of tests: every single one that tests for uses or declarations of debug intrinsics and does not explicitly disable writing records. If this patch has broken your downstream tests (or upstream tests on a configuration I wasn't able to run): 1. If you need to immediately unblock a build, pass `--write-experimental-debuginfo=false` to LLVM's option processing for all failing tests (remember to use `-mllvm` for clang/flang to forward arguments to LLVM). 2. For most test failures, the changes are trivial and mechanical, enough that they can be done by script; see the migration guide for a guide on how to do this: https://llvm.org/docs/RemoveDIsDebugInfo.html#test-updates 3. If any tests fail for reasons other than FileCheck check lines that need updating, such as assertion failures, that is most likely a real bug with this patch and should be reported as such. For more information, see the recent PSA: https://discourse.llvm.org/t/psa-ir-output-changing-from-debug-intrinsics-to-debug-records/79578
360 lines
13 KiB
LLVM
360 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=reassociate -S | FileCheck %s
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; PR37098 - https://bugs.llvm.org/show_bug.cgi?id=37098
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; In all positive tests, we should reassociate binops
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; to allow more factoring folds.
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; There are 5 associative integer binops *
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; 13 integer binops *
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; 4 operand commutes =
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; 260 potential variations of this fold
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; for integer binops. There are another 40 for FP.
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; Mix the commutation options to provide coverage using less tests.
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define i8 @and_shl(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @and_shl(
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; CHECK-NEXT: [[SX:%.*]] = shl i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = shl i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = and i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = and i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = shl i8 %x, %shamt
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%sy = shl i8 %y, %shamt
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%a = and i8 %sx, %z
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%r = and i8 %sy, %a
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ret i8 %r
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}
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define i8 @or_shl(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @or_shl(
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; CHECK-NEXT: [[SX:%.*]] = shl i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = shl i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = or i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = or i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = shl i8 %x, %shamt
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%sy = shl i8 %y, %shamt
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%a = or i8 %sx, %z
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%r = or i8 %a, %sy
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ret i8 %r
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}
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define i8 @xor_shl(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @xor_shl(
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; CHECK-NEXT: [[SX:%.*]] = shl i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = shl i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = xor i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = xor i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = shl i8 %x, %shamt
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%sy = shl i8 %y, %shamt
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%a = xor i8 %z, %sx
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%r = xor i8 %a, %sy
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ret i8 %r
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}
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define i8 @and_lshr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @and_lshr(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = lshr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = and i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = and i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = lshr i8 %x, %shamt
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%sy = lshr i8 %y, %shamt
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%a = and i8 %z, %sx
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%r = and i8 %sy, %a
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ret i8 %r
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}
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define i8 @or_lshr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @or_lshr(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = lshr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = or i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = or i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = lshr i8 %x, %shamt
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%sy = lshr i8 %y, %shamt
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%a = or i8 %sx, %z
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%r = or i8 %sy, %a
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ret i8 %r
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}
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define i8 @xor_lshr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @xor_lshr(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = lshr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = xor i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = xor i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = lshr i8 %x, %shamt
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%sy = lshr i8 %y, %shamt
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%a = xor i8 %sx, %z
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%r = xor i8 %a, %sy
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ret i8 %r
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}
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define i8 @and_ashr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @and_ashr(
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; CHECK-NEXT: [[SX:%.*]] = ashr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = ashr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = and i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = and i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = ashr i8 %x, %shamt
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%sy = ashr i8 %y, %shamt
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%a = and i8 %z, %sx
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%r = and i8 %a, %sy
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ret i8 %r
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}
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define i8 @or_ashr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @or_ashr(
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; CHECK-NEXT: [[SX:%.*]] = ashr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = ashr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = or i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = or i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = ashr i8 %x, %shamt
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%sy = ashr i8 %y, %shamt
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%a = or i8 %z, %sx
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%r = or i8 %sy, %a
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ret i8 %r
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}
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; Vectors work too.
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define <2 x i8> @xor_ashr(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z, <2 x i8> %shamt) {
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; CHECK-LABEL: @xor_ashr(
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; CHECK-NEXT: [[SX:%.*]] = ashr <2 x i8> [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = ashr <2 x i8> [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = xor <2 x i8> [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = xor <2 x i8> [[A]], [[SY]]
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; CHECK-NEXT: ret <2 x i8> [[R]]
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;
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%sx = ashr <2 x i8> %x, %shamt
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%sy = ashr <2 x i8> %y, %shamt
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%a = xor <2 x i8> %sx, %z
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%r = xor <2 x i8> %a, %sy
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ret <2 x i8> %r
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}
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; Negative test - different logic ops
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define i8 @or_and_shl(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @or_and_shl(
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; CHECK-NEXT: [[SX:%.*]] = shl i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = shl i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = or i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = and i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = shl i8 %x, %shamt
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%sy = shl i8 %y, %shamt
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%a = or i8 %sx, %z
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%r = and i8 %sy, %a
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ret i8 %r
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}
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; Negative test - different shift ops
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define i8 @or_lshr_shl(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @or_lshr_shl(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = shl i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = or i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = or i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = lshr i8 %x, %shamt
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%sy = shl i8 %y, %shamt
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%a = or i8 %sx, %z
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%r = or i8 %a, %sy
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ret i8 %r
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}
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; Negative test - multi-use
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define i8 @xor_lshr_multiuse(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @xor_lshr_multiuse(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = lshr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[A:%.*]] = xor i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = xor i8 [[A]], [[SY]]
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; CHECK-NEXT: [[R2:%.*]] = sdiv i8 [[A]], [[R]]
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; CHECK-NEXT: ret i8 [[R2]]
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;
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%sx = lshr i8 %x, %shamt
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%sy = lshr i8 %y, %shamt
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%a = xor i8 %sx, %z
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%r = xor i8 %a, %sy
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%r2 = sdiv i8 %a, %r
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ret i8 %r2
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}
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; Math ops work too. Change instruction positions too to verify placement.
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define i8 @add_lshr(i8 %x, i8 %y, i8 %z, i8 %shamt) {
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; CHECK-LABEL: @add_lshr(
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; CHECK-NEXT: [[SX:%.*]] = lshr i8 [[X:%.*]], [[SHAMT:%.*]]
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; CHECK-NEXT: [[A:%.*]] = add i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = lshr i8 [[Y:%.*]], [[SHAMT]]
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; CHECK-NEXT: [[R:%.*]] = add i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = lshr i8 %x, %shamt
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%a = add i8 %sx, %z
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%sy = lshr i8 %y, %shamt
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%r = add i8 %a, %sy
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ret i8 %r
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}
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; Make sure wrapping flags are cleared.
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define i8 @mul_sub(i8 %x, i8 %y, i8 %z, i8 %m) {
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; CHECK-LABEL: @mul_sub(
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; CHECK-NEXT: [[SX:%.*]] = sub i8 [[X:%.*]], [[M:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = sub i8 [[Y:%.*]], [[M]]
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; CHECK-NEXT: [[A:%.*]] = mul nsw i8 [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = mul nuw i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = sub i8 %x, %m
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%sy = sub i8 %y, %m
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%a = mul nsw i8 %sx, %z
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%r = mul nuw i8 %a, %sy
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ret i8 %r
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}
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define i8 @add_mul(i8 %x, i8 %y, i8 %z, i8 %m) {
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; CHECK-LABEL: @add_mul(
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; CHECK-NEXT: [[SX:%.*]] = mul nuw i8 [[X:%.*]], 42
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; CHECK-NEXT: [[A:%.*]] = add nuw i8 [[Z:%.*]], [[SX]]
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; CHECK-NEXT: [[SY:%.*]] = mul nsw i8 [[M:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[R:%.*]] = add nsw i8 [[A]], [[SY]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%sx = mul nuw i8 %x, 42
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%a = add nuw i8 %sx, %z
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%sy = mul nsw i8 %y, %m
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%r = add nsw i8 %sy, %a
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ret i8 %r
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}
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; Floating-point works too if it's not strict.
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; TODO: These should not require the full 'fast' FMF.
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define float @fadd_fmul(float %x, float %y, float %z, float %m) {
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; CHECK-LABEL: @fadd_fmul(
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; CHECK-NEXT: [[SX:%.*]] = fmul float [[X:%.*]], [[M:%.*]]
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; CHECK-NEXT: [[A:%.*]] = fadd fast float [[SX]], [[Z:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = fmul float [[Y:%.*]], [[M]]
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; CHECK-NEXT: [[R:%.*]] = fadd fast float [[A]], [[SY]]
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; CHECK-NEXT: ret float [[R]]
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;
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%sx = fmul float %x, %m
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%a = fadd fast float %sx, %z
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%sy = fmul float %y, %m
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%r = fadd fast float %sy, %a
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ret float %r
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}
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define float @fmul_fdiv(float %x, float %y, float %z, float %m) {
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; CHECK-LABEL: @fmul_fdiv(
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; CHECK-NEXT: [[SX:%.*]] = fdiv float [[X:%.*]], [[M:%.*]]
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; CHECK-NEXT: [[SY:%.*]] = fdiv float [[Y:%.*]], 4.200000e+01
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; CHECK-NEXT: [[A:%.*]] = fmul fast float [[SY]], [[Z:%.*]]
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; CHECK-NEXT: [[R:%.*]] = fmul fast float [[A]], [[SX]]
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; CHECK-NEXT: ret float [[R]]
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;
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%sx = fdiv float %x, %m
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%sy = fdiv float %y, 42.0
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%a = fmul fast float %z, %sx
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%r = fmul fast float %sy, %a
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ret float %r
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}
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; Verify that debug info for modified instructions gets discarded (references become undef).
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define i32 @and_shl_dbg(i32 %x, i32 %y, i32 %z, i32 %shamt) {
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; CHECK-LABEL: @and_shl_dbg(
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; CHECK-NEXT: #dbg_value(i32 [[X:%.*]], [[META7:![0-9]+]], !DIExpression(), [[META20:![0-9]+]])
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; CHECK-NEXT: #dbg_value(i32 [[Y:%.*]], [[META13:![0-9]+]], !DIExpression(), [[META21:![0-9]+]])
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; CHECK-NEXT: #dbg_value(i32 [[Z:%.*]], [[META14:![0-9]+]], !DIExpression(), [[META22:![0-9]+]])
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; CHECK-NEXT: #dbg_value(i32 [[SHAMT:%.*]], [[META15:![0-9]+]], !DIExpression(), [[META23:![0-9]+]])
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; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X]], [[SHAMT]], !dbg [[DBG24:![0-9]+]]
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; CHECK-NEXT: #dbg_value(i32 [[SHL]], [[META16:![0-9]+]], !DIExpression(), [[META25:![0-9]+]])
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; CHECK-NEXT: [[SHL1:%.*]] = shl i32 [[Y]], [[SHAMT]], !dbg [[DBG26:![0-9]+]]
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; CHECK-NEXT: #dbg_value(i32 [[SHL1]], [[META17:![0-9]+]], !DIExpression(), [[META27:![0-9]+]])
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], [[Z]], !dbg [[DBG28:![0-9]+]]
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; CHECK-NEXT: #dbg_value(i32 [[AND]], [[META18:![0-9]+]], !DIExpression(), [[META29:![0-9]+]])
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; CHECK-NEXT: [[AND2:%.*]] = and i32 [[AND]], [[SHL1]], !dbg [[DBG30:![0-9]+]]
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; CHECK-NEXT: #dbg_value(i32 [[AND2]], [[META19:![0-9]+]], !DIExpression(), [[META31:![0-9]+]])
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; CHECK-NEXT: ret i32 [[AND2]], !dbg [[DBG32:![0-9]+]]
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;
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call void @llvm.dbg.value(metadata i32 %x, metadata !13, metadata !DIExpression()), !dbg !21
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call void @llvm.dbg.value(metadata i32 %y, metadata !14, metadata !DIExpression()), !dbg !22
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call void @llvm.dbg.value(metadata i32 %z, metadata !15, metadata !DIExpression()), !dbg !23
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call void @llvm.dbg.value(metadata i32 %shamt, metadata !16, metadata !DIExpression()), !dbg !24
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%shl = shl i32 %x, %shamt, !dbg !25
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call void @llvm.dbg.value(metadata i32 %shl, metadata !17, metadata !DIExpression()), !dbg !26
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%shl1 = shl i32 %y, %shamt, !dbg !27
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call void @llvm.dbg.value(metadata i32 %shl1, metadata !18, metadata !DIExpression()), !dbg !28
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%and = and i32 %shl, %z, !dbg !29
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call void @llvm.dbg.value(metadata i32 %and, metadata !19, metadata !DIExpression()), !dbg !30
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%and2 = and i32 %and, %shl1, !dbg !31
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call void @llvm.dbg.value(metadata i32 %and2, metadata !20, metadata !DIExpression()), !dbg !32
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ret i32 %and2, !dbg !33
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}
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declare void @llvm.dbg.value(metadata, metadata, metadata)
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5, !6}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 7.0.0 (trunk 331069)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "ass.c", directory: "/Users/spatel/myllvm/release/bin")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = !{i32 7, !"PIC Level", i32 2}
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!7 = !{!"clang version 7.0.0 (trunk 331069)"}
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!8 = distinct !DISubprogram(name: "and_shl_dbg", scope: !1, file: !1, line: 1, type: !9, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !12)
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!9 = !DISubroutineType(types: !10)
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!10 = !{!11, !11, !11, !11, !11}
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!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!12 = !{!13, !14, !15, !16, !17, !18, !19, !20}
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!13 = !DILocalVariable(name: "x", arg: 1, scope: !8, file: !1, line: 1, type: !11)
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!14 = !DILocalVariable(name: "y", arg: 2, scope: !8, file: !1, line: 1, type: !11)
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!15 = !DILocalVariable(name: "z", arg: 3, scope: !8, file: !1, line: 1, type: !11)
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|
!16 = !DILocalVariable(name: "shamt", arg: 4, scope: !8, file: !1, line: 1, type: !11)
|
|
!17 = !DILocalVariable(name: "sx", scope: !8, file: !1, line: 2, type: !11)
|
|
!18 = !DILocalVariable(name: "sy", scope: !8, file: !1, line: 3, type: !11)
|
|
!19 = !DILocalVariable(name: "a", scope: !8, file: !1, line: 4, type: !11)
|
|
!20 = !DILocalVariable(name: "r", scope: !8, file: !1, line: 5, type: !11)
|
|
!21 = !DILocation(line: 1, column: 21, scope: !8)
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|
!22 = !DILocation(line: 1, column: 28, scope: !8)
|
|
!23 = !DILocation(line: 1, column: 35, scope: !8)
|
|
!24 = !DILocation(line: 1, column: 42, scope: !8)
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|
!25 = !DILocation(line: 2, column: 14, scope: !8)
|
|
!26 = !DILocation(line: 2, column: 7, scope: !8)
|
|
!27 = !DILocation(line: 3, column: 14, scope: !8)
|
|
!28 = !DILocation(line: 3, column: 7, scope: !8)
|
|
!29 = !DILocation(line: 4, column: 14, scope: !8)
|
|
!30 = !DILocation(line: 4, column: 7, scope: !8)
|
|
!31 = !DILocation(line: 5, column: 14, scope: !8)
|
|
!32 = !DILocation(line: 5, column: 7, scope: !8)
|
|
!33 = !DILocation(line: 6, column: 3, scope: !8)
|
|
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