58a94b1d0a
Need to look through the SExt/ZExt scalars to be gathered, when trying to reduce their width after minbitwidth analysis to prevent permanent attempts to revectorize such gathered instructions.
84 lines
3.0 KiB
LLVM
84 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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define void @h() {
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; CHECK-LABEL: define void @h() {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, ptr null, i64 16
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; CHECK-NEXT: store <8 x i16> zeroinitializer, ptr [[ARRAYIDX2]], align 2
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; CHECK-NEXT: ret void
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;
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entry:
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%arrayidx2 = getelementptr i8, ptr null, i64 16
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%conv310 = zext i16 0 to i32
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%add4 = or i32 %conv310, 0
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%sub = or i32 0, %conv310
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%conv15 = sext i16 0 to i32
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%shr = ashr i32 %conv15, 0
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%arrayidx18 = getelementptr i8, ptr null, i64 24
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%conv19 = sext i16 0 to i32
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%sub20 = or i32 %shr, 0
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%shr29 = ashr i32 %conv19, 0
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%add30 = or i32 %shr29, %conv15
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%sub39 = or i32 %sub, %sub20
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%conv40 = trunc i32 %sub39 to i16
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store i16 %conv40, ptr %arrayidx2, align 2
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%sub44 = or i32 %add4, %add30
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%conv45 = trunc i32 %sub44 to i16
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store i16 %conv45, ptr %arrayidx18, align 2
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%arrayidx2.1 = getelementptr i8, ptr null, i64 18
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%conv3.112 = zext i16 0 to i32
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%add4.1 = or i32 %conv3.112, 0
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%sub.1 = or i32 0, %conv3.112
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%conv15.1 = sext i16 0 to i32
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%shr.1 = ashr i32 %conv15.1, 0
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%arrayidx18.1 = getelementptr i8, ptr null, i64 26
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%conv19.1 = sext i16 0 to i32
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%sub20.1 = or i32 %shr.1, 0
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%shr29.1 = ashr i32 %conv19.1, 0
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%add30.1 = or i32 %shr29.1, 0
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%sub39.1 = or i32 %sub.1, %sub20.1
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%conv40.1 = trunc i32 %sub39.1 to i16
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store i16 %conv40.1, ptr %arrayidx2.1, align 2
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%sub44.1 = or i32 %add4.1, %add30.1
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%conv45.1 = trunc i32 %sub44.1 to i16
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store i16 %conv45.1, ptr %arrayidx18.1, align 2
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%conv.213 = zext i16 0 to i32
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%arrayidx2.2 = getelementptr i8, ptr null, i64 20
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%conv3.214 = zext i16 0 to i32
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%add4.2 = or i32 0, %conv.213
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%sub.2 = or i32 0, %conv3.214
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%conv15.2 = sext i16 0 to i32
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%shr.2 = ashr i32 %conv15.2, 0
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%arrayidx18.2 = getelementptr i8, ptr null, i64 28
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%conv19.2 = sext i16 0 to i32
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%sub20.2 = or i32 %shr.2, 0
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%shr29.2 = ashr i32 %conv19.2, 0
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%add30.2 = or i32 %shr29.2, 0
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%sub39.2 = or i32 %sub.2, %sub20.2
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%conv40.2 = trunc i32 %sub39.2 to i16
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store i16 %conv40.2, ptr %arrayidx2.2, align 2
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%sub44.2 = or i32 %add4.2, %add30.2
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%conv45.2 = trunc i32 %sub44.2 to i16
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store i16 %conv45.2, ptr %arrayidx18.2, align 2
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%conv.315 = zext i16 0 to i32
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%arrayidx2.3 = getelementptr i8, ptr null, i64 22
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%conv3.316 = zext i16 0 to i32
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%add4.3 = or i32 0, %conv.315
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%sub.3 = or i32 0, %conv3.316
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%conv15.3 = sext i16 0 to i32
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%shr.3 = ashr i32 %conv15.3, 0
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%arrayidx18.3 = getelementptr i8, ptr null, i64 30
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%conv19.3 = sext i16 0 to i32
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%sub20.3 = or i32 %shr.3, 0
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%shr29.3 = ashr i32 %conv19.3, 0
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%add30.3 = or i32 %shr29.3, 0
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%sub39.3 = or i32 %sub.3, %sub20.3
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%conv40.3 = trunc i32 %sub39.3 to i16
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store i16 %conv40.3, ptr %arrayidx2.3, align 2
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%sub44.3 = or i32 %add4.3, %add30.3
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%conv45.3 = trunc i32 %sub44.3 to i16
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store i16 %conv45.3, ptr %arrayidx18.3, align 2
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ret void
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}
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