72e8b9aeaa
This change allows to expose through an interface attributes wrapping content as external resources, and the usage inside the ModuleToObject show how we will be able to provide runtime libraries without relying on the filesystem.
520 lines
19 KiB
C++
520 lines
19 KiB
C++
//===- Target.cpp - MLIR LLVM ROCDL target compilation ----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This files defines ROCDL target related functions including registration
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// calls for the `#rocdl.target` compilation attribute.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Target/LLVM/ROCDL/Target.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/Support/FileUtilities.h"
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#include "mlir/Target/LLVM/ROCDL/Utils.h"
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#include "mlir/Target/LLVMIR/Export.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCParser/MCTargetAsmParser.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/FileSystem.h"
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#include "llvm/Support/FileUtilities.h"
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#include "llvm/Support/Path.h"
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#include "llvm/Support/Program.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/TargetParser/TargetParser.h"
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#include <cstdlib>
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#include <optional>
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using namespace mlir;
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using namespace mlir::ROCDL;
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#ifndef __DEFAULT_ROCM_PATH__
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#define __DEFAULT_ROCM_PATH__ ""
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#endif
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namespace {
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// Implementation of the `TargetAttrInterface` model.
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class ROCDLTargetAttrImpl
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: public gpu::TargetAttrInterface::FallbackModel<ROCDLTargetAttrImpl> {
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public:
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std::optional<SmallVector<char, 0>>
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serializeToObject(Attribute attribute, Operation *module,
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const gpu::TargetOptions &options) const;
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Attribute createObject(Attribute attribute, Operation *module,
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const SmallVector<char, 0> &object,
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const gpu::TargetOptions &options) const;
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};
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} // namespace
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// Register the ROCDL dialect, the ROCDL translation and the target interface.
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void mlir::ROCDL::registerROCDLTargetInterfaceExternalModels(
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DialectRegistry ®istry) {
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registry.addExtension(+[](MLIRContext *ctx, ROCDL::ROCDLDialect *dialect) {
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ROCDLTargetAttr::attachInterface<ROCDLTargetAttrImpl>(*ctx);
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});
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}
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void mlir::ROCDL::registerROCDLTargetInterfaceExternalModels(
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MLIRContext &context) {
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DialectRegistry registry;
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registerROCDLTargetInterfaceExternalModels(registry);
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context.appendDialectRegistry(registry);
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}
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// Search for the ROCM path.
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StringRef mlir::ROCDL::getROCMPath() {
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if (const char *var = std::getenv("ROCM_PATH"))
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return var;
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if (const char *var = std::getenv("ROCM_ROOT"))
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return var;
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if (const char *var = std::getenv("ROCM_HOME"))
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return var;
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return __DEFAULT_ROCM_PATH__;
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}
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SerializeGPUModuleBase::SerializeGPUModuleBase(
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Operation &module, ROCDLTargetAttr target,
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const gpu::TargetOptions &targetOptions)
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: ModuleToObject(module, target.getTriple(), target.getChip(),
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target.getFeatures(), target.getO()),
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target(target), toolkitPath(targetOptions.getToolkitPath()),
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librariesToLink(targetOptions.getLibrariesToLink()) {
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// If `targetOptions` has an empty toolkitPath use `getROCMPath`
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if (toolkitPath.empty())
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toolkitPath = getROCMPath();
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// Append the files in the target attribute.
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if (target.getLink())
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librariesToLink.append(target.getLink().begin(), target.getLink().end());
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}
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void SerializeGPUModuleBase::init() {
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static llvm::once_flag initializeBackendOnce;
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llvm::call_once(initializeBackendOnce, []() {
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// If the `AMDGPU` LLVM target was built, initialize it.
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#if MLIR_ENABLE_ROCM_CONVERSIONS
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LLVMInitializeAMDGPUTarget();
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LLVMInitializeAMDGPUTargetInfo();
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LLVMInitializeAMDGPUTargetMC();
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LLVMInitializeAMDGPUAsmParser();
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LLVMInitializeAMDGPUAsmPrinter();
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#endif
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});
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}
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ROCDLTargetAttr SerializeGPUModuleBase::getTarget() const { return target; }
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StringRef SerializeGPUModuleBase::getToolkitPath() const { return toolkitPath; }
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ArrayRef<Attribute> SerializeGPUModuleBase::getLibrariesToLink() const {
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return librariesToLink;
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}
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LogicalResult SerializeGPUModuleBase::appendStandardLibs(AMDGCNLibraries libs) {
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if (libs == AMDGCNLibraries::None)
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return success();
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StringRef pathRef = getToolkitPath();
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// Get the path for the device libraries
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SmallString<256> path;
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path.insert(path.begin(), pathRef.begin(), pathRef.end());
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llvm::sys::path::append(path, "amdgcn", "bitcode");
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pathRef = StringRef(path.data(), path.size());
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// Fail if the path is invalid.
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if (!llvm::sys::fs::is_directory(pathRef)) {
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getOperation().emitError() << "ROCm amdgcn bitcode path: " << pathRef
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<< " does not exist or is not a directory";
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return failure();
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}
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// Helper function for adding a library.
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auto addLib = [&](const Twine &lib) -> bool {
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auto baseSize = path.size();
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llvm::sys::path::append(path, lib);
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StringRef pathRef(path.data(), path.size());
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if (!llvm::sys::fs::is_regular_file(pathRef)) {
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getOperation().emitRemark() << "bitcode library path: " << pathRef
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<< " does not exist or is not a file";
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return true;
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}
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librariesToLink.push_back(StringAttr::get(target.getContext(), pathRef));
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path.truncate(baseSize);
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return false;
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};
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// Add ROCm device libraries. Fail if any of the libraries is not found, ie.
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// if any of the `addLib` failed.
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if ((any(libs & AMDGCNLibraries::Ocml) && addLib("ocml.bc")) ||
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(any(libs & AMDGCNLibraries::Ockl) && addLib("ockl.bc")) ||
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(any(libs & AMDGCNLibraries::Hip) && addLib("hip.bc")) ||
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(any(libs & AMDGCNLibraries::OpenCL) && addLib("opencl.bc")))
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return failure();
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return success();
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}
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std::optional<SmallVector<std::unique_ptr<llvm::Module>>>
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SerializeGPUModuleBase::loadBitcodeFiles(llvm::Module &module) {
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// Return if there are no libs to load.
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if (deviceLibs == AMDGCNLibraries::None && librariesToLink.empty())
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return SmallVector<std::unique_ptr<llvm::Module>>();
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if (failed(appendStandardLibs(deviceLibs)))
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return std::nullopt;
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SmallVector<std::unique_ptr<llvm::Module>> bcFiles;
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if (failed(loadBitcodeFilesFromList(module.getContext(), librariesToLink,
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bcFiles, true)))
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return std::nullopt;
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return std::move(bcFiles);
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}
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LogicalResult SerializeGPUModuleBase::handleBitcodeFile(llvm::Module &module) {
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// Some ROCM builds don't strip this like they should
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if (auto *openclVersion = module.getNamedMetadata("opencl.ocl.version"))
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module.eraseNamedMetadata(openclVersion);
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// Stop spamming us with clang version numbers
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if (auto *ident = module.getNamedMetadata("llvm.ident"))
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module.eraseNamedMetadata(ident);
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// Override the libModules datalayout and target triple with the compiler's
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// data layout should there be a discrepency.
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setDataLayoutAndTriple(module);
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return success();
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}
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void SerializeGPUModuleBase::handleModulePreLink(llvm::Module &module) {
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// If all libraries are not set, traverse the module to determine which
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// libraries are required.
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if (deviceLibs != AMDGCNLibraries::All) {
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for (llvm::Function &f : module.functions()) {
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if (f.hasExternalLinkage() && f.hasName() && !f.hasExactDefinition()) {
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StringRef funcName = f.getName();
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if ("printf" == funcName)
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deviceLibs |= AMDGCNLibraries::OpenCL | AMDGCNLibraries::Ockl |
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AMDGCNLibraries::Ocml;
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if (funcName.starts_with("__ockl_"))
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deviceLibs |= AMDGCNLibraries::Ockl;
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if (funcName.starts_with("__ocml_"))
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deviceLibs |= AMDGCNLibraries::Ocml;
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if (funcName == "__atomic_work_item_fence")
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deviceLibs |= AMDGCNLibraries::Hip;
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}
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}
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}
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addControlVariables(module, deviceLibs, target.hasWave64(), target.hasDaz(),
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target.hasFiniteOnly(), target.hasUnsafeMath(),
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target.hasFastMath(), target.hasCorrectSqrt(),
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target.getAbi());
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}
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void SerializeGPUModuleBase::addControlVariables(
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llvm::Module &module, AMDGCNLibraries libs, bool wave64, bool daz,
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bool finiteOnly, bool unsafeMath, bool fastMath, bool correctSqrt,
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StringRef abiVer) {
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// Helper function for adding control variables.
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auto addControlVariable = [&module](StringRef name, uint32_t value,
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uint32_t bitwidth) {
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if (module.getNamedGlobal(name))
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return;
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llvm::IntegerType *type =
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llvm::IntegerType::getIntNTy(module.getContext(), bitwidth);
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llvm::GlobalVariable *controlVariable = new llvm::GlobalVariable(
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module, /*isConstant=*/type, true,
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llvm::GlobalValue::LinkageTypes::LinkOnceODRLinkage,
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llvm::ConstantInt::get(type, value), name, /*before=*/nullptr,
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/*threadLocalMode=*/llvm::GlobalValue::ThreadLocalMode::NotThreadLocal,
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/*addressSpace=*/4);
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controlVariable->setVisibility(
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llvm::GlobalValue::VisibilityTypes::ProtectedVisibility);
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controlVariable->setAlignment(llvm::MaybeAlign(bitwidth / 8));
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controlVariable->setUnnamedAddr(llvm::GlobalValue::UnnamedAddr::Local);
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};
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int abi = 500;
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abiVer.getAsInteger(0, abi);
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module.addModuleFlag(llvm::Module::Error, "amdhsa_code_object_version", abi);
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// Return if no device libraries are required.
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if (libs == AMDGCNLibraries::None)
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return;
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// Add ocml related control variables.
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if (any(libs & AMDGCNLibraries::Ocml)) {
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addControlVariable("__oclc_finite_only_opt", finiteOnly || fastMath, 8);
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addControlVariable("__oclc_daz_opt", daz || fastMath, 8);
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addControlVariable("__oclc_correctly_rounded_sqrt32",
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correctSqrt && !fastMath, 8);
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addControlVariable("__oclc_unsafe_math_opt", unsafeMath || fastMath, 8);
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}
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// Add ocml or ockl related control variables.
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if (any(libs & (AMDGCNLibraries::Ocml | AMDGCNLibraries::Ockl))) {
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addControlVariable("__oclc_wavefrontsize64", wave64, 8);
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// Get the ISA version.
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llvm::AMDGPU::IsaVersion isaVersion = llvm::AMDGPU::getIsaVersion(chip);
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// Add the ISA control variable.
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addControlVariable("__oclc_ISA_version",
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isaVersion.Minor + 100 * isaVersion.Stepping +
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1000 * isaVersion.Major,
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32);
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addControlVariable("__oclc_ABI_version", abi, 32);
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}
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}
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std::optional<SmallVector<char, 0>>
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SerializeGPUModuleBase::assembleIsa(StringRef isa) {
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auto loc = getOperation().getLoc();
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StringRef targetTriple = this->triple;
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SmallVector<char, 0> result;
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llvm::raw_svector_ostream os(result);
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llvm::Triple triple(llvm::Triple::normalize(targetTriple));
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std::string error;
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const llvm::Target *target =
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llvm::TargetRegistry::lookupTarget(triple.normalize(), error);
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if (!target) {
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emitError(loc, Twine("failed to lookup target: ") + error);
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return std::nullopt;
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}
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llvm::SourceMgr srcMgr;
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srcMgr.AddNewSourceBuffer(llvm::MemoryBuffer::getMemBuffer(isa), SMLoc());
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const llvm::MCTargetOptions mcOptions;
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std::unique_ptr<llvm::MCRegisterInfo> mri(
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target->createMCRegInfo(targetTriple));
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std::unique_ptr<llvm::MCAsmInfo> mai(
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target->createMCAsmInfo(*mri, targetTriple, mcOptions));
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std::unique_ptr<llvm::MCSubtargetInfo> sti(
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target->createMCSubtargetInfo(targetTriple, chip, features));
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llvm::MCContext ctx(triple, mai.get(), mri.get(), sti.get(), &srcMgr,
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&mcOptions);
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std::unique_ptr<llvm::MCObjectFileInfo> mofi(target->createMCObjectFileInfo(
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ctx, /*PIC=*/false, /*LargeCodeModel=*/false));
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ctx.setObjectFileInfo(mofi.get());
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SmallString<128> cwd;
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if (!llvm::sys::fs::current_path(cwd))
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ctx.setCompilationDir(cwd);
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std::unique_ptr<llvm::MCStreamer> mcStreamer;
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std::unique_ptr<llvm::MCInstrInfo> mcii(target->createMCInstrInfo());
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llvm::MCCodeEmitter *ce = target->createMCCodeEmitter(*mcii, ctx);
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llvm::MCAsmBackend *mab = target->createMCAsmBackend(*sti, *mri, mcOptions);
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mcStreamer.reset(target->createMCObjectStreamer(
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triple, ctx, std::unique_ptr<llvm::MCAsmBackend>(mab),
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mab->createObjectWriter(os), std::unique_ptr<llvm::MCCodeEmitter>(ce),
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*sti));
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std::unique_ptr<llvm::MCAsmParser> parser(
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createMCAsmParser(srcMgr, ctx, *mcStreamer, *mai));
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std::unique_ptr<llvm::MCTargetAsmParser> tap(
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target->createMCAsmParser(*sti, *parser, *mcii, mcOptions));
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if (!tap) {
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emitError(loc, "assembler initialization error");
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return std::nullopt;
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}
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parser->setTargetParser(*tap);
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parser->Run(false);
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return std::move(result);
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}
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std::optional<SmallVector<char, 0>>
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SerializeGPUModuleBase::compileToBinary(const std::string &serializedISA) {
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// Assemble the ISA.
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std::optional<SmallVector<char, 0>> isaBinary = assembleIsa(serializedISA);
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if (!isaBinary) {
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getOperation().emitError() << "failed during ISA assembling";
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return std::nullopt;
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}
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// Save the ISA binary to a temp file.
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int tempIsaBinaryFd = -1;
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SmallString<128> tempIsaBinaryFilename;
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if (llvm::sys::fs::createTemporaryFile("kernel%%", "o", tempIsaBinaryFd,
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tempIsaBinaryFilename)) {
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getOperation().emitError()
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<< "failed to create a temporary file for dumping the ISA binary";
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return std::nullopt;
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}
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llvm::FileRemover cleanupIsaBinary(tempIsaBinaryFilename);
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{
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llvm::raw_fd_ostream tempIsaBinaryOs(tempIsaBinaryFd, true);
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tempIsaBinaryOs << StringRef(isaBinary->data(), isaBinary->size());
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tempIsaBinaryOs.flush();
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}
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// Create a temp file for HSA code object.
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SmallString<128> tempHsacoFilename;
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if (llvm::sys::fs::createTemporaryFile("kernel", "hsaco",
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tempHsacoFilename)) {
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getOperation().emitError()
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<< "failed to create a temporary file for the HSA code object";
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return std::nullopt;
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}
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llvm::FileRemover cleanupHsaco(tempHsacoFilename);
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llvm::SmallString<128> lldPath(toolkitPath);
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llvm::sys::path::append(lldPath, "llvm", "bin", "ld.lld");
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int lldResult = llvm::sys::ExecuteAndWait(
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lldPath,
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{"ld.lld", "-shared", tempIsaBinaryFilename, "-o", tempHsacoFilename});
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if (lldResult != 0) {
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getOperation().emitError() << "lld invocation failed";
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return std::nullopt;
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}
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// Load the HSA code object.
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auto hsacoFile =
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llvm::MemoryBuffer::getFile(tempHsacoFilename, /*IsText=*/false);
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if (!hsacoFile) {
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getOperation().emitError()
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<< "failed to read the HSA code object from the temp file";
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return std::nullopt;
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}
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StringRef buffer = (*hsacoFile)->getBuffer();
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return SmallVector<char, 0>(buffer.begin(), buffer.end());
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}
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std::optional<SmallVector<char, 0>> SerializeGPUModuleBase::moduleToObjectImpl(
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const gpu::TargetOptions &targetOptions, llvm::Module &llvmModule) {
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// Return LLVM IR if the compilation target is offload.
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#define DEBUG_TYPE "serialize-to-llvm"
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LLVM_DEBUG({
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llvm::dbgs() << "LLVM IR for module: "
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<< cast<gpu::GPUModuleOp>(getOperation()).getNameAttr() << "\n"
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<< llvmModule << "\n";
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});
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#undef DEBUG_TYPE
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if (targetOptions.getCompilationTarget() == gpu::CompilationTarget::Offload)
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return SerializeGPUModuleBase::moduleToObject(llvmModule);
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std::optional<llvm::TargetMachine *> targetMachine =
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getOrCreateTargetMachine();
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if (!targetMachine) {
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getOperation().emitError() << "target Machine unavailable for triple "
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<< triple << ", can't compile with LLVM";
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return std::nullopt;
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}
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// Translate the Module to ISA.
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std::optional<std::string> serializedISA =
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translateToISA(llvmModule, **targetMachine);
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if (!serializedISA) {
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getOperation().emitError() << "failed translating the module to ISA";
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return std::nullopt;
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}
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#define DEBUG_TYPE "serialize-to-isa"
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LLVM_DEBUG({
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llvm::dbgs() << "ISA for module: "
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<< cast<gpu::GPUModuleOp>(getOperation()).getNameAttr() << "\n"
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<< *serializedISA << "\n";
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});
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#undef DEBUG_TYPE
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// Return ISA assembly code if the compilation target is assembly.
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if (targetOptions.getCompilationTarget() == gpu::CompilationTarget::Assembly)
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return SmallVector<char, 0>(serializedISA->begin(), serializedISA->end());
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// Compiling to binary requires a valid ROCm path, fail if it's not found.
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if (getToolkitPath().empty()) {
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getOperation().emitError() << "invalid ROCm path, please set a valid path";
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return std::nullopt;
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}
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// Compile to binary.
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return compileToBinary(*serializedISA);
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}
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#if MLIR_ENABLE_ROCM_CONVERSIONS
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namespace {
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class AMDGPUSerializer : public SerializeGPUModuleBase {
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public:
|
|
AMDGPUSerializer(Operation &module, ROCDLTargetAttr target,
|
|
const gpu::TargetOptions &targetOptions);
|
|
|
|
std::optional<SmallVector<char, 0>>
|
|
moduleToObject(llvm::Module &llvmModule) override;
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|
|
|
private:
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|
// Target options.
|
|
gpu::TargetOptions targetOptions;
|
|
};
|
|
} // namespace
|
|
|
|
AMDGPUSerializer::AMDGPUSerializer(Operation &module, ROCDLTargetAttr target,
|
|
const gpu::TargetOptions &targetOptions)
|
|
: SerializeGPUModuleBase(module, target, targetOptions),
|
|
targetOptions(targetOptions) {}
|
|
|
|
std::optional<SmallVector<char, 0>>
|
|
AMDGPUSerializer::moduleToObject(llvm::Module &llvmModule) {
|
|
return moduleToObjectImpl(targetOptions, llvmModule);
|
|
}
|
|
#endif // MLIR_ENABLE_ROCM_CONVERSIONS
|
|
|
|
std::optional<SmallVector<char, 0>> ROCDLTargetAttrImpl::serializeToObject(
|
|
Attribute attribute, Operation *module,
|
|
const gpu::TargetOptions &options) const {
|
|
assert(module && "The module must be non null.");
|
|
if (!module)
|
|
return std::nullopt;
|
|
if (!mlir::isa<gpu::GPUModuleOp>(module)) {
|
|
module->emitError("module must be a GPU module");
|
|
return std::nullopt;
|
|
}
|
|
#if MLIR_ENABLE_ROCM_CONVERSIONS
|
|
AMDGPUSerializer serializer(*module, cast<ROCDLTargetAttr>(attribute),
|
|
options);
|
|
serializer.init();
|
|
return serializer.run();
|
|
#else
|
|
module->emitError("the `AMDGPU` target was not built. Please enable it when "
|
|
"building LLVM");
|
|
return std::nullopt;
|
|
#endif // MLIR_ENABLE_ROCM_CONVERSIONS
|
|
}
|
|
|
|
Attribute
|
|
ROCDLTargetAttrImpl::createObject(Attribute attribute, Operation *module,
|
|
const SmallVector<char, 0> &object,
|
|
const gpu::TargetOptions &options) const {
|
|
gpu::CompilationTarget format = options.getCompilationTarget();
|
|
// If format is `fatbin` transform it to binary as `fatbin` is not yet
|
|
// supported.
|
|
gpu::KernelTableAttr kernels;
|
|
if (format > gpu::CompilationTarget::Binary) {
|
|
format = gpu::CompilationTarget::Binary;
|
|
kernels = ROCDL::getKernelMetadata(module, object);
|
|
}
|
|
DictionaryAttr properties{};
|
|
Builder builder(attribute.getContext());
|
|
StringAttr objectStr =
|
|
builder.getStringAttr(StringRef(object.data(), object.size()));
|
|
return builder.getAttr<gpu::ObjectAttr>(attribute, format, objectStr,
|
|
properties, kernels);
|
|
}
|