87104faac4
This is an initial base commit for ARM64 target arch support. I don't represent that it complete or bug-free, but wish to put it out for review now that some basic things like branch target & load/store address relocs are working. I can add more tests to this base commit, or add them in follow-up commits. It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated. Differential Revision: https://reviews.llvm.org/D88629
48 lines
1.7 KiB
C++
48 lines
1.7 KiB
C++
//===- Target.cpp ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "Target.h"
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#include "InputSection.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "lld/Common/ErrorHandler.h"
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using namespace llvm;
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using namespace lld;
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using namespace lld::macho;
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const TargetInfo::RelocAttrs TargetInfo::invalidRelocAttrs{"INVALID",
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RelocAttrBits::_0};
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bool TargetInfo::validateSymbolRelocation(const Symbol *sym,
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const InputSection *isec,
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const Reloc &r) {
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const RelocAttrs &relocAttrs = getRelocAttrs(r.type);
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bool valid = true;
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auto message = [relocAttrs, sym, isec, &valid](const Twine &diagnostic) {
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valid = false;
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return (relocAttrs.name + " relocation " + diagnostic + " for `" +
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sym->getName() + "' in " + toString(isec))
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.str();
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};
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if ((relocAttrs.hasAttr(RelocAttrBits::TLV) &&
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!relocAttrs.hasAttr(RelocAttrBits::BYTE8)) != sym->isTlv())
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error(message(Twine("requires that variable ") +
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(sym->isTlv() ? "not " : "") + "be thread-local"));
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if (relocAttrs.hasAttr(RelocAttrBits::DYSYM8) && isa<DylibSymbol>(sym) &&
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r.length != 3)
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error(message("has width " + std::to_string(1 << r.length) +
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" bytes, but must be 8 bytes"));
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return valid;
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}
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TargetInfo *macho::target = nullptr;
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