a88c722e68
PAC/BTI-related codegen in the AArch64 backend is controlled by a set of LLVM IR function attributes, added to the function by Clang, based on command-line options and GCC-style function attributes. However, functions, generated in the LLVM middle end (for example, asan.module.ctor or __llvm_gcov_write_out) do not get any attributes and the backend incorrectly does not do any PAC/BTI code generation. This patch record the default state of PAC/BTI codegen in a set of LLVM IR module-level attributes, based on command-line options: * "sign-return-address", with non-zero value means generate code to sign return addresses (PAC-RET), zero value means disable PAC-RET. * "sign-return-address-all", with non-zero value means enable PAC-RET for all functions, zero value means enable PAC-RET only for functions, which spill LR. * "sign-return-address-with-bkey", with non-zero value means use B-key for signing, zero value mean use A-key. This set of attributes are always added for AArch64 targets (as opposed, for example, to interpreting a missing attribute as having a value 0) in order to be able to check for conflicts when combining module attributed during LTO. Module-level attributes are overridden by function level attributes. All the decision making about whether to not to generate PAC and/or BTI code is factored out into AArch64FunctionInfo, there shouldn't be any places left, other than AArch64FunctionInfo, which directly examine PAC/BTI attributes, except AArch64AsmPrinter.cpp, which is/will-be handled by a separate patch. Differential Revision: https://reviews.llvm.org/D85649
115 lines
3.9 KiB
C++
115 lines
3.9 KiB
C++
//=- AArch64MachineFunctionInfo.cpp - AArch64 Machine Function Info ---------=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements AArch64-specific per-machine-function
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/// information.
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///
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//===----------------------------------------------------------------------===//
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#include "AArch64MachineFunctionInfo.h"
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#include "AArch64InstrInfo.h"
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#include <llvm/IR/Metadata.h>
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#include <llvm/IR/Module.h>
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using namespace llvm;
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yaml::AArch64FunctionInfo::AArch64FunctionInfo(
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const llvm::AArch64FunctionInfo &MFI)
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: HasRedZone(MFI.hasRedZone()) {}
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void yaml::AArch64FunctionInfo::mappingImpl(yaml::IO &YamlIO) {
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MappingTraits<AArch64FunctionInfo>::mapping(YamlIO, *this);
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}
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void AArch64FunctionInfo::initializeBaseYamlFields(
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const yaml::AArch64FunctionInfo &YamlMFI) {
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if (YamlMFI.HasRedZone.hasValue())
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HasRedZone = YamlMFI.HasRedZone;
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}
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static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
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// The function should be signed in the following situations:
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// - sign-return-address=all
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// - sign-return-address=non-leaf and the functions spills the LR
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if (!F.hasFnAttribute("sign-return-address")) {
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const Module &M = *F.getParent();
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if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address"))) {
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if (Sign->getZExtValue()) {
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if (const auto *All = mdconst::extract_or_null<ConstantInt>(
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M.getModuleFlag("sign-return-address-all")))
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return {true, All->getZExtValue()};
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return {true, false};
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}
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}
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return {false, false};
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}
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StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
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if (Scope.equals("none"))
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return {false, false};
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if (Scope.equals("all"))
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return {true, true};
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assert(Scope.equals("non-leaf"));
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return {true, false};
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}
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static bool ShouldSignWithBKey(const Function &F) {
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if (!F.hasFnAttribute("sign-return-address-key")) {
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if (const auto *BKey = mdconst::extract_or_null<ConstantInt>(
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F.getParent()->getModuleFlag("sign-return-address-with-bkey")))
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return BKey->getZExtValue();
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return false;
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}
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const StringRef Key =
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F.getFnAttribute("sign-return-address-key").getValueAsString();
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assert(Key.equals_lower("a_key") || Key.equals_lower("b_key"));
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return Key.equals_lower("b_key");
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}
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AArch64FunctionInfo::AArch64FunctionInfo(MachineFunction &MF) : MF(MF) {
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// If we already know that the function doesn't have a redzone, set
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// HasRedZone here.
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if (MF.getFunction().hasFnAttribute(Attribute::NoRedZone))
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HasRedZone = false;
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const Function &F = MF.getFunction();
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std::tie(SignReturnAddress, SignReturnAddressAll) = GetSignReturnAddress(F);
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SignWithBKey = ShouldSignWithBKey(F);
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if (!F.hasFnAttribute("branch-target-enforcement")) {
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if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
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F.getParent()->getModuleFlag("branch-target-enforcement")))
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BranchTargetEnforcement = BTE->getZExtValue();
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return;
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}
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const StringRef BTIEnable = F.getFnAttribute("branch-target-enforcement").getValueAsString();
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assert(BTIEnable.equals_lower("true") || BTIEnable.equals_lower("false"));
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BranchTargetEnforcement = BTIEnable.equals_lower("true");
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}
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bool AArch64FunctionInfo::shouldSignReturnAddress(bool SpillsLR) const {
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if (!SignReturnAddress)
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return false;
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if (SignReturnAddressAll)
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return true;
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return SpillsLR;
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}
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bool AArch64FunctionInfo::shouldSignReturnAddress() const {
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return shouldSignReturnAddress(llvm::any_of(
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MF.getFrameInfo().getCalleeSavedInfo(),
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[](const auto &Info) { return Info.getReg() == AArch64::LR; }));
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}
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