8f004471c2
Add a triple for powerpcle-*-*. This is a little-endian encoding of the 32-bit PowerPC ABI, useful in certain niche situations: 1) A loader such as the FreeBSD loader which will be loading a little endian kernel. This is required for PowerPC64LE to load properly in pseries VMs. Such a loader is implemented as a freestanding ELF32 LSB binary. 2) Userspace emulation of a 32-bit LE architecture such as x86 on 64-bit hosts such as PowerPC64LE with tools like box86 requires having a 32-bit LE toolchain and library set, as they operate by translating only the main binary and switching to native code when making library calls. 3) The Void Linux for PowerPC project is experimenting with running an entire powerpcle userland. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D93918
67 lines
2.0 KiB
C++
67 lines
2.0 KiB
C++
//===-- PPCMCAsmInfo.cpp - PPC asm properties -----------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the MCAsmInfoDarwin properties.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCMCAsmInfo.h"
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#include "llvm/ADT/Triple.h"
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#include <cassert>
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using namespace llvm;
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void PPCELFMCAsmInfo::anchor() { }
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PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
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// FIXME: This is not always needed. For example, it is not needed in the
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// v2 abi.
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NeedsLocalForSize = true;
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if (is64Bit) {
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CodePointerSize = CalleeSaveStackSlotSize = 8;
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}
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IsLittleEndian =
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T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle;
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// ".comm align is in bytes but .align is pow-2."
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AlignmentIsInBytes = false;
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CommentString = "#";
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// Uses '.section' before '.bss' directive
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UsesELFSectionDirectiveForBSS = true;
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// Debug Information
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SupportsDebugInformation = true;
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DollarIsPC = true;
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// Set up DWARF directives
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MinInstAlignment = 4;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::DwarfCFI;
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ZeroDirective = "\t.space\t";
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Data64bitsDirective = is64Bit ? "\t.quad\t" : nullptr;
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AssemblerDialect = 1; // New-Style mnemonics.
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LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
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}
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void PPCXCOFFMCAsmInfo::anchor() {}
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PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
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if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle)
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report_fatal_error("XCOFF is not supported for little-endian targets");
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CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4;
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// A size of 8 is only supported by the assembler under 64-bit.
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Data64bitsDirective = Is64Bit ? "\t.vbyte\t8, " : nullptr;
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}
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