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clang-p2996/llvm/test/CodeGen/ARM
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Sanjay Patel c981f6f8e1 Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library" 
This reverts commit 2303e93e66.
Investigating bot failures.
2021-02-05 15:10:11 -05:00
..
GlobalISel
[ARM][GISel] Treat calls as variadic even if only fixed arguments provided
2021-01-15 09:37:01 +00:00
ParallelDSP
[ARM] Update test target triple. NFC
2021-01-18 16:36:00 +00:00
Windows
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
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2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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2010-05-21-BuildVector.ll
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
2015-09-30 10:56:37 +00:00
2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
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2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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2010-08-04-EHCrash.ll
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2010-08-04-StackVariable.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
2010-09-21-OptCmpBug.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll
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2010-12-07-PEIBug.ll
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2010-12-08-tpsoft.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
2010-12-15-elf-lcomm.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
2010-12-17-LocalStackSlotCrash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
2011-01-19-MergedGlobalDbg.ll
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2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
2011-06-09-TailCallByVal.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2011-06-16-TailCallByVal.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2011-06-29-MergeGlobalsAlign.ll
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2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
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2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll
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2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
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2011-10-26-ExpandUnalignedLoadCrash.ll
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2011-10-26-memset-inline.ll
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2011-10-26-memset-with-neon.ll
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2011-11-07-PromoteVectorLoadStore.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2011-11-09-BitcastVectorDouble.ll
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2011-11-09-IllegalVectorFPIntConvert.ll
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2011-11-14-EarlyClobber.ll
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2011-11-28-DAGCombineBug.ll
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2011-11-29-128bitArithmetics.ll
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2011-11-30-MergeAlignment.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2011-12-14-machine-sink.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
2011-12-19-sjlj-clobber.ll
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2012-01-23-PostRA-LICM.ll
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2012-01-24-RegSequenceLiveRange.ll
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2012-01-26-CoalescerBug.ll
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2012-01-26-CopyPropKills.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
2012-02-01-CoalescerBug.ll
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2012-03-05-FPSCR-bug.ll
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2012-03-13-DAGCombineBug.ll
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2012-03-26-FoldImmBug.ll
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2012-04-02-TwoAddrInstrCrash.ll
TBAA: remove !tbaa from testing cases if not used.
2013-04-29 22:58:55 +00:00
2012-04-10-DAGCombine.ll
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2012-04-24-SplitEHCriticalEdge.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
2012-05-04-vmov.ll
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2012-05-10-PreferVMOVtoVDUP32.ll
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2012-05-29-TailDupBug.ll
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2012-06-12-SchedMemLatency.ll
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2012-08-04-DtripleSpillReload.ll
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2012-08-08-legalize-unaligned.ll
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2012-08-09-neon-extload.ll
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2012-08-13-bfi.ll
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2012-08-23-legalize-vmull.ll
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2012-08-27-CopyPhysRegCrash.ll
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2012-08-30-select.ll
[CodeGenPrepare] Freeze condition when transforming select to br
2020-03-16 12:46:20 +09:00
2012-09-18-ARMv4ISelBug.ll
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2012-09-25-InlineAsmScalarToVectorConv2.ll
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2012-09-25-InlineAsmScalarToVectorConv.ll
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2012-10-04-AAPCS-byval-align8.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2012-10-04-FixedFrame-vs-byval.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2012-10-04-LDRB_POST_IMM-Crash.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2012-10-18-PR14099-ByvalFrameAddress.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2012-11-14-subs_carry.ll
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2013-01-21-PR14992.ll
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2013-02-27-expand-vfma.ll
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2013-04-05-Small-ByVal-Structs-PR15293.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-04-16-AAPCS-C4-vs-VFP.ll
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2013-04-16-AAPCS-C5-vs-VFP.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-04-18-load-overlap-PR14824.ll
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2013-04-21-AAPCS-VA-C.1.cp.ll
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2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-05-05-IfConvertBug.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
2013-05-07-ByteLoadSameAddress.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2013-05-13-AAPCS-byval-padding2.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-05-13-AAPCS-byval-padding.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-05-13-DAGCombiner-undef-mask.ll
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2013-05-31-char-shift-crash.ll
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2013-06-03-ByVal-2Kbytes.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2013-07-29-vector-or-combine.ll
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2013-10-11-select-stalls.ll
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2013-11-08-inline-asm-neon-array.ll
ARM: produce friendly error for invalid inline asm
2013-11-14 17:15:39 +00:00
2014-01-09-pseudo_expand_implicit_reg.ll
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2014-02-05-vfp-regs-after-stack.ll
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2014-02-21-byval-reg-split-alignment.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
2014-05-14-DwarfEHCrash.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
2014-07-18-earlyclobber-str-post.ll
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2014-08-04-muls-it.ll
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2015-01-21-thumbv4t-ldstr-opt.ll
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2016-05-01-RegScavengerAssert.ll
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2016-08-24-ARM-LDST-dbginfo-bug.ll
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2018-02-13-PR36079.ll
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a15-mla.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
a15-partial-update.ll
[BreakFalseDeps] ignore function with minsize attribute
2019-09-23 17:01:01 +00:00
a15-SD-dep.ll
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a15.ll
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aapcs-hfa-code.ll
[ARM] Cortex-M4 schedule
2019-05-15 12:41:58 +00:00
aapcs-hfa.ll
Attempt to pacify the bots - this commit requires asserts.
2014-05-09 16:20:53 +00:00
acle-intrinsics-rot.ll
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acle-intrinsics-v5.ll
[ARM] Fix qdadd operand order
2020-03-31 10:11:36 +01:00
acle-intrinsics.ll
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
add-like-or.ll
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addrmode.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
addrspacecast.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
addsubcarry-promotion.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
addsubo-legalization.ll
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adv-copy-opt.ll
ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
2015-07-17 23:18:30 +00:00
aeabi-read-tp.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
aggregate-padding.ll
[ARM] Fix over-alignment in arguments that are HA of 128-bit vectors
2018-07-30 08:49:30 +00:00
alias_align.ll
[DAGCombine] Fix alignment for offset loads/stores
2018-06-21 08:30:07 +00:00
alias_store.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
aliases.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
align-sp-adjustment.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
alloc-no-stack-realign.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
alloca-align.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
alloca.ll
…
analyze-branch-bkpt.ll
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and-cmpz.ll
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and-load-combine.ll
Fix invalid alignment in DAGCombiner::isLegalNarrowLdSt
2020-06-29 09:22:15 +00:00
and-sext-combine.ll
[llvm][AArch64] Simplify (and (sign_extend..) #bitmask).
2020-11-09 12:53:36 +00:00
apcs-vfp.ll
ARM: add extra test for watchOS ABI
2015-10-30 16:29:44 +00:00
arg-copy-elide.ll
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argaddr.ll
ARM: update even more tests
2014-04-03 17:35:22 +00:00
arguments2.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments3.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments4.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments5.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments6.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments7.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments8.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
Use Unified Assembly Syntax for the ARM backend.
2009-11-09 00:11:35 +00:00
arguments-nosplit-double.ll
…
arguments-nosplit-i64.ll
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arguments.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
arm32-round-conv.ll
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arm32-rounding.ll
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arm-abi-attr.ll
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arm-and-tst-peephole.ll
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arm-asm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
arm-bf16-dotprod-intrinsics.ll
[ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics
2020-08-27 18:43:16 +01:00
arm-bf16-pcs.ll
[ARM][BFloat] Legalize bf16 type even without fullfp16.
2020-06-24 09:36:26 +01:00
arm-eabi.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
arm-frame-lowering-no-terminator.ll
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arm-frameaddr.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
arm-half-promote.ll
[NFC][test] Adding fastcc test case for promoted 16-bit integer bitcasts.
2020-07-09 11:38:49 -07:00
arm-insert-subvector.ll
[ARM] Check for assembler instructions in test.
2017-08-23 11:53:24 +00:00
arm-macho-tail.ll
ARM: use an external relocation for calls from MachO ARM mode.
2017-08-18 19:13:56 +00:00
arm-matmul.ll
[AArch32] Armv8.6-a Matrix Mult Assembly + Intrinsics
2020-04-24 15:54:06 +01:00
arm-modifier.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
arm-negative-stride.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
arm-position-independence-jump-table.ll
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arm-position-independence.ll
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arm-returnaddr.ll
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arm-shrink-wrapping-linux.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
arm-shrink-wrapping.ll
[ARM] Update and regenerate test checks. NFC
2021-01-08 14:54:16 +00:00
arm-storebytesmerge.ll
[ARM] Update arm-storebytesmerge.ll test. NFC
2020-09-11 13:56:57 +01:00
arm-ttype-target2.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
arm-vld1.ll
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arm-vlddup-update.ll
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arm-vlddup.ll
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arm-vst1.ll
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ARMLoadStoreDBG.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
armv4.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
armv8.2a-fp16-vector-intrinsics.ll
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atomic-64bit.ll
[ARM] Do not emit ldrexd/strexd on Cortex-M chips
2021-02-04 21:55:34 +01:00
atomic-cmp.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
atomic-cmpxchg.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
atomic-load-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atomic-op.ll
…
atomic-ops-m33.ll
ARM: use acquire/release instruction variants when available.
2018-12-17 15:05:32 +00:00
atomic-ops-v8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomicrmw_minmax.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
available_externally.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
avoid-cpsr-rmw.ll
[ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
2019-07-03 09:58:52 +00:00
bf16-convert-intrinsics.ll
[BFloat] Add convert/copy instrinsic support
2020-06-23 14:27:05 +00:00
bf16-create-get-set-dup.ll
[ARM][BFloat] Lowering of create/get/set/dup intrinsics
2020-06-19 12:52:40 +00:00
bf16-getlane-with-fp16.ll
[ARM][BFloat] Lowering of create/get/set/dup intrinsics
2020-06-19 12:52:40 +00:00
bf16-intrinsics-ld-st.ll
[ARM][BFloat] Implement lowering of bf16 load/store intrinsics
2020-06-19 14:02:35 +00:00
bfc.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
bfi.ll
[ARM] Regenerate bfi.ll test cases
2020-01-07 16:51:11 +00:00
bfloat.ll
[ARM] Basic bfloat support
2020-06-18 17:26:24 +01:00
bfx.ll
[ARM] Add additional matching for UBFX instructions
2016-06-01 12:01:01 +00:00
bic.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bicZext.ll
This change handles a another case for generating the bic instruction
2012-06-18 14:51:32 +00:00
big-endian-eh-unwind.ll
…
big-endian-neon-bitconv.ll
…
big-endian-neon-extend.ll
…
big-endian-neon-fp16-bitconv.ll
[MachineInstr] Add support for instructions with multiple memory operands.
2020-11-03 20:44:40 -05:00
big-endian-neon-trunc-store.ll
…
big-endian-ret-f64.ll
…
big-endian-vector-callee.ll
…
big-endian-vector-caller.ll
…
big-endian-vmov.ll
[ARM] Fix incorrect handling of big-endian vmov.i64
2020-04-03 17:36:50 +01:00
bit-reverse-to-rbit.ll
RBIT Instruction only available for ARMv6t2 and above.
2016-01-08 18:43:41 +00:00
bits.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap16.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
bswap-inline-asm.ll
…
build-attributes-encoding.s
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
build-attributes-fn-attr0.ll
…
build-attributes-fn-attr1.ll
…
build-attributes-fn-attr2.ll
…
build-attributes-fn-attr3.ll
…
build-attributes-fn-attr4.ll
ARM: Fixup some tests using denormal-fp-math attribute
2020-03-10 14:02:06 -04:00
build-attributes-fn-attr5.ll
ARM: Fixup some tests using denormal-fp-math attribute
2020-03-10 14:02:06 -04:00
build-attributes-fn-attr6.ll
ARM: Fixup some tests using denormal-fp-math attribute
2020-03-10 14:02:06 -04:00
build-attributes-optimization-minsize.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-mixed.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-optnone.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization-optsize.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes-optimization.ll
[test] Change llvm-readobj --arm-attributes to --arch-specific after r373125
2019-09-30 04:45:14 +00:00
build-attributes.ll
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
bx_fold.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
byval_load_align.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
byval-align.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
cache-intrinsic.ll
…
call_nolink.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
call-noret-minsize.ll
…
call-noret.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
call-tc.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
call.ll
Don't print (PLT) on arm.
2016-06-16 16:09:53 +00:00
carry.ll
Address buildbot fallout from r259065
2016-01-28 18:59:04 +00:00
cbz-implicit-it-range.ll
[ARM] Account for implicit IT when calculating inline asm size
2018-10-08 09:38:28 +00:00
cfguard-checks.ll
Add support for __declspec(guard(nocf))
2020-01-10 16:04:12 +00:00
cfguard-module-flag.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
cfi-alignment.ll
ARM: add support for WatchOS's compact unwind information.
2015-10-28 22:56:36 +00:00
clang-section.ll
ARM: Fixup some tests using denormal-fp-math attribute
2020-03-10 14:02:06 -04:00
cls.ll
[ARM][AArch64] Implement __cls, __clsl and __clsll intrinsics from ACLE
2019-10-28 11:06:58 +00:00
clz.ll
[ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available.
2018-08-22 21:47:14 +00:00
cmn.ll
[ARM] Make InstrEmitter mark CPSR defs dead for Thumb1.
2018-10-26 19:32:24 +00:00
cmov_fp16.ll
[ARM] Remove hasSideEffects from FP converts
2020-07-05 16:23:24 +01:00
cmp1-peephole-thumb.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
cmp2-peephole-thumb.mir
…
cmp-bool.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
cmp.ll
ARM: use target-specific SUBS node when combining cmp with cmov.
2018-12-03 11:16:21 +00:00
cmpxchg-idioms.ll
…
cmpxchg-O0-be.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
cmpxchg-O0.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
cmpxchg-weak.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
cmpxchg.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
cmse-clear-float-bigend.mir
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-clear-float-hard2.ll
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-clear-float-hard.ll
[ARM] Select f32 constants with vmov.f16
2020-09-21 11:10:47 +01:00
cmse-clear-float-mve.ll
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-clear-float.ll
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-clear.ll
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-clrm-it-block.ll
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-errors.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
cmse-expand-bxns-ret.mir
Re-commit: [ARM] CMSE code generation
2020-05-14 16:46:16 +01:00
cmse-vlldm-no-reorder.ll
[ARM] Describe defs/uses of VLLDM and VLSTM
2020-06-23 16:04:23 +01:00
cmse-vlldm-no-reorder.mir
[ARM] Describe defs/uses of VLLDM and VLSTM
2020-06-23 16:04:23 +01:00
cmse.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
coalesce-dbgvalue.ll
…
coalesce-subregs.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
code-placement.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
codemodel.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
codesize-ifcvt.mir
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
coff-no-dead-strip.ll
…
combine-movc-sub.ll
…
combine-vmovdrr.ll
…
commute-movcc.ll
…
compare-call.ll
…
const-load-align-thumb.mir
[Thumb] set code alignment for 16-bit load from constant pool
2020-07-22 10:12:41 +01:00
constant-island-crash.ll
…
constant-island-movwt.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
constant-island-SOImm-limit16.mir
[ARM] Fix so immediates and pc relative checks
2020-09-14 08:52:59 +01:00
constant-islands-cfg.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
constant-islands-split-IT.mir
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
constant-islands.ll
[AsmPrinter] Print FP constant in hexadecimal form instead
2020-02-07 16:00:55 +00:00
constantfp.ll
[ARM][XO] Execute-only miscompiles double literals for big-endian
2020-06-08 08:13:08 +01:00
constantpool-align.ll
[PGO][PGSO] Enable size optimizations in code gen / target passes for cold code.
2019-12-13 11:01:19 -08:00
constantpool-promote-dbg.ll
…
constantpool-promote-duplicate.ll
…
constantpool-promote-ldrh.ll
…
constantpool-promote.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
constants.ll
AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
2015-12-08 02:37:48 +00:00
copy-by-struct-i32.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
copy-cpsr.ll
…
copy-paired-reg.ll
…
cortex-a57-misched-alu.ll
…
cortex-a57-misched-basic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-ldm-wrback.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
cortex-a57-misched-ldm.ll
…
cortex-a57-misched-mla.mir
Attempt to fix buildbot after rG993eaf2d69d8
2020-12-04 22:10:36 +03:00
cortex-a57-misched-stm-wrback.ll
…
cortex-a57-misched-stm.ll
…
cortex-a57-misched-vadd.ll
…
cortex-a57-misched-vfma.ll
…
cortex-a57-misched-vldm-wrback.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
cortex-a57-misched-vldm.ll
…
cortex-a57-misched-vstm-wrback.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
cortex-a57-misched-vstm.ll
Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias"
2020-05-22 21:26:46 +02:00
cortex-a57-misched-vsub.ll
…
cortexr52-misched-basic.ll
[ARM] Enable misched for R52.
2018-04-27 11:29:49 +00:00
crash-greedy-v6.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
crash-greedy.ll
…
crash-O0.ll
…
crash-on-pow2-shufflevector.ll
…
crash-shufflevector.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
crash.ll
…
crc32.ll
…
cse-call.ll
…
cse-flags.ll
…
cse-ldrlit.ll
…
cse-libcalls.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
csr-split.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
ctor_order.ll
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
2019-05-15 02:35:32 +00:00
ctors_dtors.ll
…
cttz_vector.ll
[ARM] Regenerate cttz tests
2018-10-14 16:49:04 +00:00
cttz.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cxx-tlscc.ll
…
dag-combine-ldst.ll
…
dagcombine-anyexttozeroext.ll
[ARM] Turn sext_inreg(VGetLaneu) into VGetLaneu
2021-02-01 11:10:35 +00:00
dagcombine-concatvector.ll
…
darwin-eabi.ll
ARM: switch armv7em MachO triple to hard-float defaults and libcalls.
2018-07-19 12:44:51 +00:00
darwin-tls-preserved.ll
…
darwin-tls.ll
…
data-in-code-annotations.ll
ARM & AArch64: make use of common cmpxchg idioms after expansion
2014-05-30 10:09:59 +00:00
dbg-range-extension.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
dbg-tcreturn.ll
[ScheduleDAG] Move DBG_VALUEs after first term forward.
2020-07-17 10:27:43 +01:00
dbg.ll
ARM: Add patterns for dbg
2014-08-26 12:47:26 +00:00
DbgValueOtherTargets.test
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
debug-frame-large-stack.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame-no-debug.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame-vararg.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
debug-frame.ll
[ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1.
2019-03-20 19:40:45 +00:00
debug-info-arg.ll
Revert "[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field"
2020-02-06 14:41:40 +00:00
debug-info-blocks.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
debug-info-branch-folding.ll
[ARM] preserve test intent by removing undef
2018-05-16 21:57:00 +00:00
debug-info-d16-reg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-no-frame.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-qreg.ll
[ARM] make test immune to scalarization improvements; NFC
2018-12-14 18:47:04 +00:00
debug-info-s16-reg.ll
…
debug-info-sreg2.ll
DWARFDebugLoc(v4): Add an incremental parsing function
2019-11-15 13:38:00 +01:00
debug-segmented-stacks.ll
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
debuginfo-split-carryexpr.ll
[DebugInfo] Prevent invalid fragments at ISel from dropping debug info
2019-12-12 12:28:39 +00:00
debugtrap.ll
ARM: Use BKPT instead of TRAP to implement llvm.debugtrap.
2018-10-24 18:10:38 +00:00
default-float-abi.ll
Add support for musl-libc on ARM Linux.
2016-06-24 21:14:33 +00:00
default-reloc.ll
Fix default reloc model on ARM.
2016-05-28 10:41:15 +00:00
demanded-bits-and.ll
[ARM] Handle all-ones mask explicitly in targetShrinkDemandedConstant.
2018-08-22 20:13:45 +00:00
deprecated-asm.s
…
deps-fix.ll
Separate ExecutionDepsFix into 4 parts:
2018-01-22 10:05:23 +00:00
disable-fp-elim.ll
llc: Don't overwrite frame-pointer attribute
2020-01-15 20:56:46 -05:00
disable-tail-calls.ll
Add explicit -mtriple=arm-unknown to llvm/test/CodeGen/ARM/disable-tail-calls.ll, to satisfy *-win32.
2015-06-09 23:33:25 +00:00
div.ll
[ARM] Add support for armv7ve triple in llvm (PR31358).
2017-02-09 23:29:14 +00:00
divmod-eabi.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll
…
divmod.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll
…
dsp-loop-indexing.ll
[LSR] Generate cross iteration indexes
2019-02-07 13:32:54 +00:00
dsp-mlal.ll
[ARM] Automatically generate dsp-mlal.ll . NFC
2019-08-22 23:43:48 +00:00
dwarf-eh.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
dwarf-frame.ll
[cfi] Add flag to always generate .debug_frame
2019-10-31 09:48:30 +00:00
dwarf-unwind.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
dyn-stackalloc.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
early-cfi-sections.ll
…
eh-dispcont.ll
…
eh-resume-darwin.ll
…
ehabi-filters.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
ehabi-handlerdata-nounwind.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-handlerdata.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-no-landingpad.ll
…
ehabi-unwind.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
ehabi.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
elf-lcomm-align.ll
Never use .lcomm on platforms where it does not accept an alignment
2012-11-27 16:11:16 +00:00
emit-big-cst.ll
[AsmPrinter] Fix emission of non-standard integer constants for BE targets
2020-04-27 14:57:29 -07:00
emutls1.ll
…
emutls_generic.ll
…
emutls.ll
[X86][ELF] Prefer lowering MC_GlobalAddress operands to .Lfoo$local for STV_DEFAULT only
2020-08-14 00:09:15 +01:00
execute-only-big-stack-frame.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
execute-only-section.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
execute-only.ll
[ARM] Allow execute only code on Cortex-m23
2018-09-28 08:55:19 +00:00
expand-pseudos.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
extload-knownzero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
extloadi1.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fabs-neon.ll
Improved test cases that were added with r214892.
2014-08-05 20:16:35 +00:00
fabs-to-bfc.ll
…
fabss.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
fadds.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fast-isel-align.ll
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
fast-isel-binary.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-br-const.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-br-phi.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-call-multi-reg-return.ll
…
fast-isel-call.ll
[FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
2021-01-11 09:32:49 -08:00
fast-isel-cmp-imm.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-crash2.ll
ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.
2014-01-06 14:28:05 +00:00
fast-isel-crash.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-deadcode.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
fast-isel-ext.ll
Limit the range of processors supported by ARM fast isel to v6 or
2015-09-18 20:08:18 +00:00
fast-isel-fold.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-frameaddr.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
fast-isel-GEP-coalesce.ll
…
fast-isel-icmp.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-indirectbr.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-inline-asm.ll
[FastISel] Local values shouldn't be alive across an inline asm call with side effects.
2014-07-16 22:20:51 +00:00
fast-isel-intrinsic.ll
[ARM] [ELF] Fix ARMMaterializeGV for Indirect calls
2021-01-26 15:57:55 -03:00
fast-isel-ldr-str-arm.ll
…
fast-isel-ldr-str-thumb-neg-index.ll
[FastISel] Flush local value map on every instruction
2021-01-11 08:32:36 -08:00
fast-isel-ldrh-strh-arm.ll
[FastISel] Flush local value map on every instruction
2021-01-11 08:32:36 -08:00
fast-isel-load-store-verify.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-mvn.ll
[ARM] Define a subtarget feature that is used to avoid using movt/movw
2015-07-16 00:58:23 +00:00
fast-isel-pic.ll
Fix tests.
2015-10-26 20:49:49 +00:00
fast-isel-pie.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
fast-isel-pred.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-redefinition.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-remat-same-constant.ll
[Fast-ISel] Don't mark the first use of a remat constant as killed.
2015-05-09 00:51:03 +00:00
fast-isel-ret.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-select.ll
[FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
2021-01-11 09:32:49 -08:00
fast-isel-shift-materialize.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
fast-isel-shifter.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-static.ll
[ARM] Define a subtarget feature and use it to decide whether long calls should
2015-07-07 06:54:42 +00:00
fast-isel-update-valuemap-for-extract.ll
…
fast-isel-vaddd.ll
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.
2015-05-06 16:39:17 +00:00
fast-isel-vararg.ll
[FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
2021-01-11 09:32:49 -08:00
fast-isel.ll
[FastISel] Flush local value map on every instruction
2021-01-11 08:32:36 -08:00
fast-tail-call.ll
[ARM] Add B.W and CBZ instructions to ARMv8-M Baseline
2016-01-15 10:26:17 +00:00
fastcc-vfp.ll
Tweak ARM fastcc by adopting these two AAPCS rules:
2014-02-11 23:49:31 +00:00
fastisel-gep-promote-before-add.ll
…
fastisel-thumb-litpool.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
favor-low-reg-for-Osize.ll
…
fcmp-xo.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fcopysign.ll
[SDag] SimplifyDemandedBits: simplify to FP constant if all bits known
2020-10-07 09:24:38 +01:00
fdivs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fence-singlethread.ll
Enhance synchscope representation
2017-07-11 22:23:00 +00:00
fixunsdfdi.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
flag-crash.ll
…
float-helpers.s
Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
2020-05-22 05:36:15 -06:00
floorf.ll
llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, or it fails on msvc.
2012-08-14 00:56:06 +00:00
fmacs.ll
[ARM][NFCI] Do not fuse VADD and VMUL, continued (1/2)
2018-10-17 07:26:35 +00:00
fmdrr-fmrrd.ll
…
fminmax-folds.ll
[DAGCombiner] Fold fmin/fmax with INF / FLT_MAX
2020-09-14 19:59:33 +02:00
fmscs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fmuls.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fnattr-trap.ll
…
fnegs.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fnmacs.ll
…
fnmscs.ll
…
fnmul.ll
easing the constraint for isNegatibleForFree and GetNegatedExpression
2018-06-14 20:54:13 +00:00
fnmuls.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fold-const.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fold-sext-sextload.ll
[ARM] Mark some tests as not safe for -debugify-and-strip-all, NFC
2020-04-22 17:03:39 -07:00
fold-stack-adjust.ll
[NFC] Chec[^k] -> Check
2020-12-08 11:54:39 +00:00
fold-zext-zextload.ll
[ARM] Mark some tests as not safe for -debugify-and-strip-all, NFC
2020-04-22 17:03:39 -07:00
formal.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp16-args.ll
[CodeGen] Properly propagating Calling Convention information when lowering vector arguments
2020-08-27 17:01:10 +01:00
fp16-bitcast.ll
[ARM] Select f32 constants with vmov.f16
2020-09-21 11:10:47 +01:00
fp16-frame-lowering.ll
…
fp16-fullfp16.ll
[ARM] Remove hasSideEffects from FP converts
2020-07-05 16:23:24 +01:00
fp16-fusedMAC.ll
[SelectionDAG][ARM][AArch64][Hexagon][RISCV][X86] Add SDNPCommutative to fma and fmad nodes in tablegen. Remove explicit commuted patterns from targets.
2020-11-23 10:09:20 -08:00
fp16-insert-extract.ll
[ARM] Handle f16 in GeneratePerfectShuffle
2021-02-04 11:14:52 +00:00
fp16-instructions.ll
[ARM] Remove hasSideEffects from FP converts
2020-07-05 16:23:24 +01:00
fp16-intrinsic-vector-1op.ll
…
fp16-intrinsic-vector-2op.ll
…
fp16-litpool2-arm.mir
…
fp16-litpool3-arm.mir
…
fp16-litpool-arm.mir
…
fp16-litpool-thumb.mir
…
fp16-load-store.ll
[ARM] Fix selection of VLDR.16 instruction with imm offset
2019-03-04 09:17:38 +00:00
fp16-no-condition.ll
…
fp16-promote.ll
[ARM] VBIT/VBIF support added.
2020-07-16 11:25:53 +01:00
fp16-v3.ll
[CodeGen] Properly propagating Calling Convention information when lowering vector arguments
2020-08-27 17:01:10 +01:00
fp16-vector-argument.ll
[ARM] Add bitcast/extract_subvec. of fp16 vectors
2019-04-29 10:28:07 +00:00
fp16-vld.ll
[ARM] FP16: support vld1.16 for vector loads with post-increment
2018-12-03 08:26:34 +00:00
fp16-vldlane-vstlane.ll
…
fp16-vminmaxnm-safe.ll
[ARM] Supporting lowering of half-precision FP arguments and returns in AArch32's backend
2020-06-18 13:15:13 +01:00
fp16-vminmaxnm-vector.ll
…
fp16-vminmaxnm.ll
…
fp16.ll
…
fp_convert.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp-arg-shuffle.ll
…
fp-fast.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp-intrinsics.ll
[FPEnv][ARM] Don't call mutateStrictFPToFP when lowering
2020-02-17 18:19:25 +00:00
fp-only-sp.ll
…
fp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fparith.ll
[ARM] Fix up buildbots after r246360
2015-08-29 11:50:08 +00:00
fpcmp_ueq.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpcmp-f64-neon-opt.ll
…
fpcmp-opt.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
fpcmp.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
fpconsts.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fpconv.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
fpmem.ll
…
fpoffset_overflow.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
fpow.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fpowi.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
fpscr-intrinsics.ll
…
fptoint.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fptosi-sat-scalar.ll
Add intrinsics for saturating float to int casts
2020-12-18 11:09:41 +01:00
fpvcvtr.ll
[ARM] Add LLVM tests for the vcvtr builtins
2018-02-17 19:59:29 +00:00
fragmented-args-multiple-regs.ll
Reapply: [DebugInfo] Correctly handle salvaged casts and split fragments at ISel
2019-12-18 16:26:42 +00:00
frame-register.ll
…
freeze-soften.ll
[LegalizeTypes] Add SoftenFloatRes_FREEZE
2020-03-31 10:16:38 +09:00
fsubs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ftrunc.ll
[DAGCombine] (float)((int) f) --> ftrunc (PR36617)
2018-04-20 15:07:55 +00:00
func-argpassing-endian.ll
[ARM] Simplify VMOVRRD from extracts of buildvectors
2021-02-01 16:09:25 +00:00
funnel-shift-rot.ll
[ARM][MIPS] Add funnel shift test coverage
2020-10-09 19:19:47 +01:00
funnel-shift.ll
[DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns
2020-10-12 14:11:02 +01:00
fusedMAC.ll
[ARM] Add and update FMA tests. NFC
2020-01-05 11:24:04 +00:00
gep-optimization.ll
[DAGCombiner] Fold together mul and shl when both are by a constant
2015-08-21 10:48:17 +00:00
ghc-tcreturn-lowered.ll
…
global-merge-1.ll
…
global-merge-addrspace.ll
…
global-merge-alignment.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
global-merge-dllexport.ll
[COFF] Move per-global .drective emission from AsmPrinter to TLOFCOFF
2020-09-18 14:31:01 -07:00
global-merge-external-2.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
global-merge-external.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
global-merge.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
globals.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
gnu_mcount_nc.ll
Reland "[ARM] push LR before __gnu_mcount_nc"
2019-08-16 23:30:16 +00:00
gpr-paired-spill-thumbinst.ll
…
gpr-paired-spill.ll
…
gv-stubs-crash.ll
…
half.ll
[ARM] Explicit lowering of half <-> double conversions.
2019-06-25 11:24:50 +00:00
hardfloat_neon.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
hello.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
hfa-in-contiguous-registers.ll
…
hidden-vis-2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
hidden-vis-3.ll
[TargetMachine] Drop implied dso_local for an edge case (extern_weak + non-pic + hidden)
2020-12-05 15:52:33 -08:00
hidden-vis.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
hints.ll
ARM: provide a new generic hint intrinsic
2014-04-25 17:24:24 +00:00
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
i1.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
i64_volatile_load_store.ll
[ARM] Improve codegen of volatile load/store of i64
2020-05-28 10:52:43 +01:00
iabs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ifconv-kills.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ifconv-regmask.ll
…
ifcvt1.ll
…
ifcvt2.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ifcvt3.ll
Correctly modify the CFG in IfConverter, and then remove the
2020-05-07 18:17:07 -04:00
ifcvt4.ll
Codegen: Tail Merge: Be less aggressive with special cases.
2016-08-10 18:36:18 +00:00
ifcvt5.ll
…
ifcvt6.ll
…
ifcvt7.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
…
ifcvt11.ll
…
ifcvt12.ll
…
ifcvt_canFallThroughTo.mir
…
ifcvt_diamond_unanalyzable.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt_diamondSameTrueFalse.mir
[IfConversion] Disallow TrueBB == FalseBB for valid diamonds
2020-04-08 12:50:36 +02:00
ifcvt_forked_diamond_unanalyzable.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt_simple_bad_zero_prob_succ.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt_simple_unanalyzable.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt_triangleSameCvtNext.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt_triangleWoCvtToNextEdge.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
ifcvt-branch-weight-bug.ll
[BPI] Improve static heuristics for "cold" paths.
2020-12-23 22:47:36 +07:00
ifcvt-branch-weight.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
ifcvt-callback.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
ifcvt-dead-def.ll
…
ifcvt-diamond-unanalyzable-common.mir
Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.
2020-07-01 12:51:50 -04:00
ifcvt-iter-indbr.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
ifcvt-regmask-noreturn.ll
Fix typo in comment
2020-04-09 10:36:00 +01:00
ifcvt-size.mir
[ARM] Unrestrict Armv8-a IT when at minsize
2020-08-10 14:59:53 +01:00
illegal-bitfield-loadstore.ll
[DAG] GetDemandedBits - remove custom AND handling.
2020-08-07 12:55:47 +01:00
illegal-vector-bitcast.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
imm-peephole-arm.mir
…
imm-peephole-thumb.mir
…
imm.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
immcost.ll
[ARM] ADD with a negative offset can become SUB for free
2016-09-09 13:35:36 +00:00
inc-of-add.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
indexed-mem.ll
[ARM] Update and regenerate test checks. NFC
2021-01-08 14:54:16 +00:00
indirect-hidden.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
indirect-reg-input.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
indirectbr-2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
indirectbr-3.ll
…
indirectbr.ll
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
2018-06-20 22:01:04 +00:00
inline-asm-clobber.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
inline-asm-i-constraint-i1.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-reserved-registers.ll
Write ignored output to stdout, so this test runs on read-only filesystems.
2020-04-15 10:45:14 -07:00
inline-diagnostics.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inlineasm2.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm3.ll
[ARM] Skip inline asm memory operands in DAGToDAGISel
2016-07-20 09:48:24 +00:00
inlineasm4.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm-64bit.ll
Fix uninitialized read in ARM's PrintAsmOperand
2018-07-30 16:45:40 +00:00
inlineasm-error-t-toofewregs.ll
…
inlineasm-global.ll
llvm/test/CodeGen/ARM/inlineasm-global.ll: Add explicit triple to appease targeting *-win32.
2014-07-25 09:55:01 +00:00
inlineasm-imm-arm.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm-imm-thumb2.ll
Add some testing for thumb1 and thumb2 inline asm immediate constraints
2016-01-08 00:34:44 +00:00
inlineasm-imm-thumb.ll
Add some testing for thumb1 and thumb2 inline asm immediate constraints
2016-01-08 00:34:44 +00:00
inlineasm-ldr-pseudo.ll
[llvm-objdump] -d: print 00000000 <foo>: instead of 00000000 foo:
2020-03-05 18:05:28 -08:00
inlineasm-operand-implicit-cast.ll
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
2019-05-28 16:13:20 +00:00
inlineasm-output-template.ll
[AsmPrinter] refactor to support %c w/ GlobalAddress'
2019-04-26 18:45:04 +00:00
inlineasm-switch-mode-oneway-from-arm.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
inlineasm-switch-mode-oneway-from-thumb.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
inlineasm-switch-mode.ll
[llvm-objdump] Switch between ARM/Thumb based on mapping symbols.
2019-06-20 00:29:40 +00:00
inlineasm-X-allocation.ll
[ARM] VFPv2 only supports 16 D registers.
2019-09-17 21:42:38 +00:00
inlineasm-X-constraint.ll
Pass the test file in through stdin instead of by filename.
2016-04-26 03:43:49 +00:00
inlineasm.ll
[ARM] Support inline assembler constraints for MVE.
2019-06-25 16:49:32 +00:00
insn-sched1.ll
…
int-to-fp.ll
…
integer_insertelement.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
interrupt-attr.ll
ARM: use r7 as the frame-pointer on all MachO targets.
2016-04-11 22:27:40 +00:00
interval-update-remat.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
interwork.ll
[ARM] Add ".code 32" to functions in the ARM instruction set
2016-09-13 12:18:15 +00:00
intrinsics-cmse.ll
…
intrinsics-coprocessor.ll
…
intrinsics-crypto.ll
…
intrinsics-memory-barrier.ll
…
intrinsics-overflow.ll
…
intrinsics-v8.ll
…
invalid-target.ll
[ADT] Normalize empty triple components
2018-08-08 22:23:57 +00:00
invalidated-save-point.ll
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
ipra-exact-definition.ll
…
ipra-no-csr.ll
…
ipra-r0-returned.ll
…
ipra-reg-usage.ll
[ARM] Add a register class for GPR pairs without SP and use it. NFCI
2019-10-16 10:40:57 +00:00
ipra.ll
Reland: Fix and test inter-procedural register allocation for ARM
2019-08-05 09:04:10 +00:00
isel-v8i32-crash.ll
…
ispositive.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
jump-table-islands-split.ll
…
jump-table-islands.ll
…
jump-table-tbh.ll
…
jumptable-label.ll
…
krait-cpu-div-attribute.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
large-stack.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
large-vector.ll
ARM: don't try to over-align large vectors as arguments.
2018-05-03 12:54:25 +00:00
ldaex-stlex.ll
…
ldc2l.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
ldm-base-writeback.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
ldm-stm-base-materialization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ldm-stm-i256.ll
…
ldm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
ldr_ext.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldr_frame.ll
…
ldr_post.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldr_pre.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldrcppic.ll
[ARM] Add MemOperand to LDRcp to enable DCE.
2018-11-09 23:09:17 +00:00
ldrd-memoper.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
ldrd.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
ldrex-frame-size.ll
[ARM] Don't reserve R12 on Thumb1 as an emergency spill slot.
2019-06-26 23:46:51 +00:00
ldst-f32-2-i32.ll
…
ldstrex-m.ll
ARM: use acquire/release instruction variants when available.
2018-12-17 15:05:32 +00:00
ldstrex.ll
ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.
2018-09-07 09:21:25 +00:00
legalize-bitcast.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
legalize-fneg.ll
…
legalize-unaligned-load.ll
…
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
litpool-licm.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
llrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
load_i1_select.ll
[ARM] Allow CMPZ transforms even if the input has multiple uses.
2018-06-08 21:16:56 +00:00
load_store_multiple.ll
…
load_store_opt_clobber_cpsr.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
load_store_opt_kill.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
load_store_opt_reg_limit.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
load-address-masked.ll
…
load-arm.ll
ARM: add extra test for addrmode folding.
2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll
…
load-combine.ll
Reland "[DAGCombiner] Allow zextended load combines."
2019-11-22 14:47:18 +01:00
load-global2.ll
[arm] Fix Unnecessary reloads from GOT.
2017-11-13 20:45:38 +00:00
load-global.ll
ARM/ELF: Better codegen for global variable addresses.
2015-10-26 18:23:16 +00:00
load-store-flags.ll
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
2015-10-05 14:49:54 +00:00
load.ll
[ARM] Use sub for negative offset load/store in thumb1
2019-01-29 10:40:31 +00:00
local-call.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
log2_not_readnone.ll
Revert r151816 as Jim has the appropriate fix.
2012-03-01 17:41:19 +00:00
long_shift.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
long-setcc.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
long.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
longMAC.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
loop-align-cortex-m.ll
[LSR] Generate cross iteration indexes
2019-02-07 13:32:54 +00:00
loop-indexing.ll
[ARM] Run ARMParallelDSP in the IRPasses phase
2019-03-14 10:57:40 +00:00
loopvectorize_pr33804.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
lower-vmax.ll
[Arm] Do not lower vmax/vmin to Neon instructions
2020-03-10 10:48:48 +00:00
lowerMUL-newload.ll
[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE (REAPPLIED).
2021-01-21 13:01:34 +00:00
lrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
lsr-code-insertion.ll
ARM: override cost function to re-enable ConstantHoisting (& fix it).
2016-04-13 23:08:27 +00:00
lsr-icmp-imm.ll
…
lsr-scale-addr-mode.ll
…
lsr-setupcost.ll
[LSR] Attempt to increase the accuracy of LSR's setup cost
2019-03-07 13:44:40 +00:00
lsr-undef-in-binop.ll
Revert "Reland "[SCEV] Model ptrtoint(SCEVUnknown) cast not as unknown, but as zext/trunc/self of SCEVUnknown"" and it's follow-ups
2020-10-14 16:09:18 +03:00
lsr-unfolded-offset.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
machine-copyprop.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
machine-cse-cmp.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
machine-licm.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
machine-outliner-calls.mir
[ARM][MachineOutliner] Fix costs model.
2020-12-17 16:08:23 +01:00
machine-outliner-cfi-1.ll
[ARM][MachineOutliner] Emit more CFI instructions
2020-11-09 15:26:18 +00:00
machine-outliner-cfi-2.ll
[ARM][MachineOutliner] Emit more CFI instructions
2020-11-09 15:26:18 +00:00
machine-outliner-cfi-3.ll
[ARM][MachineOutliner] Emit more CFI instructions
2020-11-09 15:26:18 +00:00
machine-outliner-default.mir
[ARM][MachineOutliner] Add stack fixup feature
2021-01-19 10:59:09 +01:00
machine-outliner-lr-regsave.mir
[ARM][MachineOutliner] Add default mode.
2020-08-20 09:25:33 +02:00
machine-outliner-no-lr-save.mir
[ARM][MachineOutliner] Add stack fixup feature
2021-01-19 10:59:09 +01:00
machine-outliner-remove-debug-instr.mir
[MachineOutliner] Do not outline debug instructions
2020-11-05 19:26:51 +00:00
machine-outliner-return-1.ll
[ARM][MachineOutliner] Do not overestimate LR liveness in return block
2020-11-02 16:47:22 +00:00
machine-outliner-return-2.ll
[ARM][MachineOutliner] Do not overestimate LR liveness in return block
2020-11-02 16:47:22 +00:00
machine-outliner-stack-fixup-arm.mir
[ARM][MachineOutliner] Add stack fixup feature
2021-01-19 10:59:09 +01:00
machine-outliner-stack-fixup-thumb.mir
[ARM][MachineOutliner] Add stack fixup feature
2021-01-19 10:59:09 +01:00
machine-outliner-stack-use.mir
[ARM][MachineOutliner] Fix costs model.
2020-12-17 16:08:23 +01:00
machine-outliner-tail.ll
[ARM] Enable outliner at -Oz for M-class
2020-08-27 08:02:56 +01:00
machine-outliner-thunk.ll
[ARM] Enable outliner at -Oz for M-class
2020-08-27 08:02:56 +01:00
machine-outliner-unoutlinable.mir
[ARM] Alter t2DoLoopStart to define lr
2020-11-10 15:57:58 +00:00
machine-outliner-unsafe-registers.mir
[ARM][MachineOutliner] Add Machine Outliner support for ARM.
2020-05-15 08:44:23 +02:00
machine-sink-multidef.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
machine-sink-multidef.mir
[ARM] Mir test for machine sinking multiple def instructions. NFC
2020-04-16 20:58:14 +01:00
machine-verifier.mir
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
macho-embedded-float.ll
Fixed typos in tests: s/CEHCK/CHECK/
2019-02-25 13:12:33 +00:00
macho-extern-hidden.ll
Use isTargetMachO instead of isTargetDarwin.
2016-08-24 19:02:29 +00:00
macho-frame-offset.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
MachO-subtypes.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
macho-trap.ll
…
mature-mc-support.ll
…
mcp-dest-regs-no-dup.mir
[MachineCopyPropagation] BackwardPropagatableCopy: add check for hasOverlappingMultipleDef
2020-07-29 16:21:01 +01:00
mem.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
memcpy-const-vol-struct.ll
[SelectionDAG] memcpy expansion of const volatile struct ignores const zero
2020-09-07 13:22:09 +01:00
memcpy-inline.ll
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
2018-12-13 09:56:19 +00:00
memcpy-ldm-stm.ll
…
memcpy-no-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memfunc.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
memset-align.ll
[DAGCombine] Fix alias analysis for unaligned accesses
2020-02-28 18:44:36 +00:00
memset-inline.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
MergeConsecutiveStores.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
metadata-default.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
metadata-short-enums.ll
…
metadata-short-wchar.ll
…
minmax.ll
[ARM] Add instruction selection patterns for vmin/vmax
2015-08-19 14:11:27 +00:00
minsize-call-cse.ll
…
minsize-imms.ll
…
minsize-litpools.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misched-copy-arm.ll
…
misched-fp-basic.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll
…
misched-fusion-lit.ll
…
misched-int-basic-thumb2.mir
[ARM] Fix misched-int-basic-thumb2.mir typo in check to fix issue reported on D77354
2020-04-08 15:48:18 +01:00
misched-int-basic.mir
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
mls.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
movcc-double.ll
…
movt-movw-global.ll
…
movt.ll
[ARM] Add Cortex-M35P
2019-02-26 12:02:12 +00:00
msr-it-block.ll
…
mul_const.ll
[NFC][ARM] Add some test triples
2019-12-12 13:51:39 +00:00
mul.ll
ARM: update even more tests
2014-04-03 17:35:22 +00:00
mulhi.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
mult-alt-generic-arm.ll
…
mvn.ll
Add extra checks to mvn.ll test to prevent the "f1" check from matching
2014-04-12 04:47:04 +00:00
naked-no-prolog.ll
[ARM] prologue instructions emitted for naked function with >64 byte argument
2020-06-09 11:33:03 +01:00
named-reg-alloc.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
named-reg-notareg.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
negate-i1.ll
…
negative-offset.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
neon_arith1.ll
…
neon_cmp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
neon_div.ll
ARM: fix vectorized division on WoA
2017-01-27 03:41:53 +00:00
neon_fpconv.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
neon_ld1.ll
…
neon_ld2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
neon_minmax.ll
…
neon_shift.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
neon_spill.ll
…
neon_vabs.ll
…
neon_vshl_minint.ll
…
neon-dot-product.ll
…
neon-fma.ll
…
neon-spfp.ll
…
neon-v8.1a.ll
…
neon-vcadd.ll
…
neon-vmovn.ll
[ARM] Fix ReconstructShuffle for bigendian
2020-02-13 09:56:46 +00:00
neon-vqaddsub-upgrade.ll
…
nest-register.ll
…
nnan-fsub.ll
…
no_redundant_trunc_for_cmp.ll
…
no-arm-mode.ll
…
no-cfi.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
no-cmov2bfi.ll
…
no-fpscr-liveness.ll
[ARM] Remove hasSideEffects from FP converts
2020-07-05 16:23:24 +01:00
no-fpu.ll
…
no-register-coalescing-in-returnsTwice.mir
Prevent register coalescing in functions whith setjmp
2020-05-16 00:36:34 +01:00
no-tail-call.ll
…
nomerge.ll
Add NoMerge MIFlag to avoid MIR branch folding
2020-05-29 12:31:06 -07:00
none-macho-v4t.ll
…
none-macho.ll
…
nonreserved-callframe-with-basereg.mir
…
noopt-dmb-v7.ll
…
nop_concat_vectors.ll
…
noreturn-csr-skip.mir
…
noreturn.ll
…
null-streamer.ll
llvm-mc: Use Target::createNullStreamer to fix crashes on target-specific asm directives.
2015-02-19 00:45:04 +00:00
O3-pipeline.ll
Revert "[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library"
2021-02-05 15:10:11 -05:00
opt-shuff-tstore.ll
…
optimize-dmbs-v7.ll
[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.
2015-05-20 21:40:38 +00:00
optselect-regclass.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
out-of-registers.ll
…
overflow-intrinsic-optimizations.ll
…
pack.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
parity.ll
[SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors.
2020-09-12 11:42:18 -07:00
peephole-bitcast.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
peephole-callee-save-regalloc.mir
[ARM] Fix PR 47980: Use constrainRegClass during foldImmediate opt.
2020-11-10 13:38:11 -08:00
peephole-phi.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
pei-swiftself.mir
…
phi.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
pic.ll
…
pie.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
plt-relative-reloc.ll
…
popcnt.ll
[NFC] Fixed arm/aarch64 test
2019-06-11 11:09:25 +00:00
postrasched.ll
[Scheduling][ARM] Consistently enable PostRA Machine scheduling
2019-11-05 10:44:55 +00:00
pow.75.ll
[DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X))
2019-02-08 19:50:58 +00:00
pow.ll
[Codegen][ARM] Add float softening for cbrt
2019-10-28 11:08:55 +00:00
pr3502.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr13249.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr18364-movw.ll
…
pr25317.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
pr25838.ll
[LivePhysRegs] Fix handling of return instructions.
2018-02-06 23:00:17 +00:00
pr26669.ll
[SjLjEHPrepare] Don't grab pointers to functions in doInitialization
2016-02-19 03:13:40 +00:00
pr32545.ll
[SDAG] Fix visitAND optimization to deal with vector extract case again.
2017-04-06 19:05:41 +00:00
pr32578.ll
Revert [MBP] Disable aggressive loop rotate in plain mode
2019-08-29 19:03:58 +00:00
pr34045-2.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr34045.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr35103.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr36577.ll
[DAGCombiner] form 'not' ops ahead of shifts (PR39657)
2018-11-22 19:24:10 +00:00
pr39060.ll
…
pr39571.ll
[DAGCombiner] Fix load-store forwarding of indexed loads.
2018-11-12 14:05:40 +00:00
pr42062.ll
…
pr42638-VMOVRRDCombine.ll
…
pr45824.ll
Follow up of rG5f1cad4d296a, slightly reduced test case. NFC.
2020-09-07 15:11:10 +01:00
pr47454.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
PR15053.ll
…
PR32721_ifcvt_triangle_unanalyzable.mir
…
PR35379.ll
[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
2018-01-08 14:47:19 +00:00
preferred-align.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
prefetch.ll
ARM: allow rewriting frame indexes for all prefetch variants.
2019-11-14 14:26:28 +00:00
prera-ldst-aliasing.mir
…
prera-ldst-insertpt.mir
…
print-memb-operand.ll
…
print-registers.ll
…
private.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
proc-resource-sched.ll
…
qdadd.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
rbit.ll
[SelectionDAG] Add support for BITREVERSE constant folding
2017-01-16 13:39:00 +00:00
readcyclecounter.ll
…
readonly-aliases.ll
ARM: handle checking aliases with out-of-bounds GEPs
2018-10-24 00:00:52 +00:00
readtp.ll
Add newline to end of test file. NFC.
2017-09-14 14:48:59 +00:00
reg_sequence.ll
[ARM] Make MachineVerifier more strict about terminators
2020-08-27 07:10:20 +01:00
regcoal-invalid-subrange-update.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
register-scavenger-exceptions.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
regpair_hint_phys.ll
…
relax-per-target-feature.ll
…
rem_crash.ll
…
ret0.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_arg1.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_arg2.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_arg3.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_f64_arg_split.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_f64_arg_stack.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_i128_arg2.ll
…
ret_sret_vector.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
ret_void.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
returned-ext.ll
…
returned-trunc-tail-calls.ll
…
rev.ll
(Re)generate various tests. NFC
2019-10-08 16:16:26 +00:00
ror.ll
[ARM] Regenerate rotation tests
2019-07-29 09:48:07 +00:00
rotate.ll
Regenerate rotate test. NFC.
2020-02-20 13:54:43 +00:00
sadd_sat_plus.ll
[ARM] Add qadd lowering from a sadd_sat
2019-10-21 12:33:46 +00:00
sadd_sat.ll
[ARM] Only produce qadd8b under hasV6Ops
2020-04-27 10:13:29 +01:00
sat-to-bitop.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
saxpy10-a9.ll
…
sbfx.ll
ARM: spot SBFX-compatbile code expressed with sign_extend_inreg
2014-07-23 13:59:12 +00:00
sdiv-pow2-arm-size.ll
…
sdiv-pow2-thumb-size.ll
…
section-name.ll
Bring r226038 back.
2015-01-19 15:16:06 +00:00
section.ll
FileCheck-ize and simplify RUN lines.
2011-07-02 20:43:11 +00:00
segmented-stacks-dynamic.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
segmented-stacks.ll
[X86,ARM] Retain split-stack prolog check for sibling calls
2018-06-26 14:11:30 +00:00
select_const.ll
[DAGCombiner] Fold (sext (not i1 x)) -> (add (zext i1 x), -1)
2020-12-06 11:52:10 -05:00
select_xform.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
select-imm.ll
[ARM] Optimize immediate selection
2020-07-29 13:29:17 +01:00
select-undef.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
select.ll
[DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0 and no carry.
2019-09-08 19:24:39 +00:00
setcc-logic.ll
[DAGCombiner] allow hoisting vector bitwise logic ahead of truncates
2018-12-16 14:57:04 +00:00
setcc-type-mismatch.ll
…
setjmp_longjmp.ll
[CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree
2021-01-02 01:01:19 +03:00
shift_minsize.ll
Revert "[arm][darwin] Don't generate libcalls for wide shifts on Darwin"
2020-06-08 16:37:29 -07:00
shift-combine.ll
…
shift-i64.ll
…
shifter_operand.ll
…
shuffle.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
signext-inreg.ll
…
sincos.ll
…
single-issue-r52.mir
…
sjlj-prepare-critical-edge.ll
…
sjljeh-swifterror.ll
…
sjljehprepare-lower-empty-struct.ll
…
smml.ll
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
2020-02-20 14:41:39 +01:00
smul.ll
[ARM] Add missing patterns for DSP muls
2019-01-08 10:12:36 +00:00
softfp-constant-comparison.ll
[SDAG] fold x * 0.0 at node creation time
2020-10-04 11:31:57 -04:00
softfp-fabs-fneg.ll
…
space-directive.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
special-reg-acore.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
special-reg-mcore.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
special-reg-v8m-base.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
special-reg-v8m-main.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
special-reg.ll
Re-commit of r238201 with fix for building with shared libraries.
2015-06-01 12:02:47 +00:00
speculation-hardening-sls.ll
[NFC] Disallow unused prefixes under llvm/test/CodeGen
2021-01-11 12:32:18 -08:00
spill-q.ll
…
splitkit.ll
SplitKit: Fix liveness recomputation in some remat cases.
2018-02-02 00:08:19 +00:00
ssat-lower.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
ssat-unroll-loops.ll
[ARM] Prevent constants from iCmp instruction from being hoisted if part of a min(max()) pattern
2020-10-02 09:28:35 +00:00
ssat-upper.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
ssat-v4t.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
ssat-with-shift.ll
[ARM] Added more patterns to generate SSAT/USAT with shift
2020-09-28 14:50:19 +00:00
ssat.ll
[ARM] Disable sign extended SSAT pattern recognition.
2021-01-22 14:07:48 +00:00
ssp-data-layout.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
ssub_sat_plus.ll
[ARM] Add qadd lowering from a sadd_sat
2019-10-21 12:33:46 +00:00
ssub_sat.ll
…
stack_guard_remat.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
stack-alignment.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
stack-frame.ll
Fix test/CodeGen/arm.ll
2014-04-23 01:09:29 +00:00
stack-guard-reassign.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
stack-protector-bmovpcb_call.ll
Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351
2019-12-24 16:27:51 -08:00
stack-size-section.ll
[AsmPrinter] Omit unique ID for .stack_sizes
2020-02-14 21:25:06 -08:00
stackpointer.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
static-addr-hoisting.ll
[ARM] Regenerate constant hoisting test. NFC
2021-01-28 10:37:16 +00:00
stc2.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
stm.ll
…
store_half.ll
[ARM] halfword store hits llvm_unreachable with big-endian
2020-07-17 08:56:44 +01:00
str_post.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
str_pre-2.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
str_pre.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
str_trunc.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
struct_byval_arm_t1_t2.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
struct_byval.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
struct-byval-frame-index.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
sub-cmp-peephole.ll
[BPI] Improve static heuristics for "cold" paths.
2020-12-23 22:47:36 +07:00
sub-from-const-hoisting.ll
…
sub-of-not.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
sub.ll
[ARM] Add v8m.base pattern for add negative imm
2019-02-11 11:35:42 +00:00
subreg-remat.ll
…
subtarget-features-long-calls.ll
…
subtarget-no-movt.ll
…
swift-atomics.ll
…
swift-ios.ll
Swift Calling Convention: swiftcc for ARM.
2016-04-05 22:44:44 +00:00
swift-return.ll
…
swift-vldm.ll
…
swifterror.ll
[FastISel] NFC: Remove obsolete -fast-isel-sink-local-values option
2021-01-11 09:32:49 -08:00
swiftself.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
switch-minsize.ll
[SDAGBuilder] Don't create a binary tree for switches in minsize mode
2016-09-08 13:12:22 +00:00
sxt_rot.ll
…
t2-imm.ll
…
t2-shrink-ldrpost.ll
[ARM] Rearrange SizeReduction when using -Oz
2020-07-02 09:19:38 +01:00
t2abs-killflags.ll
Don't always apply kill flag in thumb2 ABS pseudo expansion.
2015-04-30 22:15:59 +00:00
tail-call-builtin.ll
…
tail-call-float.ll
[ARM] Relax restriction on variadic functions for tailcall optimization
2016-11-17 10:56:58 +00:00
tail-call-results.ll
[ARM] Fix tail call validity checking for varargs calls.
2020-05-04 12:34:14 -07:00
tail-call-scheduling.ll
[ARM] Glue register copies to tail calls.
2019-05-06 23:21:59 +00:00
tail-call-weak.ll
[ARM] [Windows] Use COFF stubs for calls to extern_weak functions
2019-12-23 12:13:49 +02:00
tail-call.ll
[CodeGen] Enable tail calls for functions with NonNull attributes.
2018-09-26 10:46:18 +00:00
tail-dup-bundle.mir
Revert "[ARM] Add CPSR as an implicit use of t2IT"
2020-02-27 15:43:44 +00:00
tail-dup-kill-flags.ll
…
tail-dup.ll
…
tail-merge-branch-weight.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
tail-opts.ll
[BranchFolding] Tail common all identical unreachable blocks
2017-02-14 21:02:24 +00:00
tailcall-mem-intrinsics.ll
…
taildup-branch-weight.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
test-sharedidx.ll
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
2015-09-18 18:19:40 +00:00
this-return.ll
…
thread_pointer.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
thumb1_return_sequence.ll
[ARM] Fix thumb1_return_sequence typo in check to fix issue reported on D77354
2020-04-08 16:00:45 +01:00
thumb1-div.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
thumb1-ldst-opt.ll
…
thumb1-varalloc.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
thumb2-it-block.ll
ARM: make Thumb1 instructions non-flag-setting in IT block.
2020-07-28 13:31:17 +01:00
thumb2-size-opt.ll
…
thumb2-size-reduction-internal-flags.ll
…
thumb_indirect_calls.ll
…
thumb-alignment.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
thumb-big-stack.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
thumb-litpool.ll
…
thumb-stub.ll
Avoid a load for local functions.
2016-06-01 21:57:11 +00:00
tls1.ll
[ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests
2020-12-30 15:23:21 -08:00
tls2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
tls3.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
tls-models.ll
…
trap-unreachable.ll
…
trap.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
trunc_ldr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
truncstore-dag-combine.ll
…
tst_teq.ll
…
tst-peephole.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
two-part-imm.ll
[ARM][test] Add more tests of two-part immediates
2020-08-14 23:11:01 +08:00
twoaddrinstr.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
uadd_sat_plus.ll
…
uadd_sat.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
uint64tof64.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
umulo-32.ll
[SDAG] Expand pow2 mulo using shifts
2019-03-12 16:57:25 +00:00
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
…
unaligned_load_store_vector.ll
…
unaligned_load_store_vfp.ll
ARM: make sure VFP loads and stores are properly aligned.
2015-10-26 21:32:53 +00:00
unaligned_load_store.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
undef-sext.ll
…
undefined.ll
ARM: introduce llvm.arm.undefined intrinsic
2014-05-22 04:46:46 +00:00
unfold-shifts.ll
…
unord.ll
…
unschedule-first-call.ll
…
unwind-fp.ll
[ARM] Fix unwind information for floating point registers
2018-09-19 13:25:31 +00:00
unwind-init.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
urem-opt-size.ll
…
usat-lower.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
usat-upper.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
usat-v4t.ll
Revert "Revert "Reland "[Support] make report_fatal_error abort instead of exit"""
2020-02-13 10:16:06 -08:00
usat-with-shift.ll
[ARM] Added more patterns to generate SSAT/USAT with shift
2020-09-28 14:50:19 +00:00
usat.ll
[ARM] Disable sign extended SSAT pattern recognition.
2021-01-22 14:07:48 +00:00
useaa.ll
[ARM] Always enable UseAA in the arm backend
2019-11-05 10:46:56 +00:00
usub_sat_plus.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
usub_sat.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
uxt_rot.ll
Regenerate rotated uxt tests
2020-01-21 10:40:17 +00:00
uxtb.ll
…
v1-constant-fold.ll
…
v6-jumptable-clobber.mir
…
v6m-smul-with-overflow.ll
…
v6m-umul-with-overflow.ll
…
v7k-abi-align.ll
[NFC] Chec[^k] -> Check
2020-12-08 11:54:39 +00:00
v7k-libcalls.ll
…
v7k-sincos.ll
…
v8m-tail-call.ll
…
v8m.base-jumptable_alignment.ll
[BPI] Improve static heuristics for "cold" paths.
2020-12-23 22:47:36 +07:00
va_arg.ll
[DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2))
2020-06-12 13:53:08 -04:00
vaba.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vabd.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vabs.ll
[ARM][NEON] Add support for ISD::ABS lowering
2017-05-08 10:37:34 +00:00
vadd.ll
[ARM] Handle any extend whilst lowering addw/addl/subw/subl
2021-01-06 11:26:39 +00:00
vararg_no_start.ll
…
varargs-spill-stack-align-nacl.ll
ARM: simplify and extend byval handling
2015-03-11 18:54:22 +00:00
vargs_align.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vargs.ll
…
vbits.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vbsl-constant.ll
[ARM] VBIT/VBIF support added.
2020-07-16 11:25:53 +01:00
vbsl.ll
[ARM] VBIT/VBIF support added.
2020-07-16 11:25:53 +01:00
vceq.ll
[ARM] Regenerate vector comparison tests
2019-03-29 17:35:11 +00:00
vcge.ll
[SelectionDAG] Add fcmp UNDEF handling to SelectionDAG::FoldSetCC
2019-04-05 14:56:21 +00:00
vcgt.ll
[ARM] Remove more unused check prefixes, NFC
2020-11-14 15:37:53 +00:00
vcnt.ll
[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.
2016-04-26 05:04:37 +00:00
vcombine.ll
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
2018-10-30 15:04:40 +00:00
vcvt_combine.ll
…
vcvt-cost.ll
…
vcvt-v8.ll
…
vcvt.ll
[ARM] Simplify VMOVRRD from extracts of buildvectors
2021-02-01 16:09:25 +00:00
vdiv_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vdup.ll
Allow combining of extract_subvector to extract element
2020-01-24 10:50:26 -08:00
vecreduce-fadd-legalization-soft-float.ll
[CodeGen] Fix neutral value of vecreduce fadd in tests (NFC)
2020-10-29 21:26:14 +01:00
vecreduce-fadd-legalization-strict.ll
[CodeGen] Fix neutral value of vecreduce fadd in tests (NFC)
2020-10-29 21:26:14 +01:00
vecreduce-fmax-legalization-soft-float.ll
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
2020-10-07 10:36:44 -07:00
vecreduce-fmin-legalization-soft-float.ll
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
2020-10-07 10:36:44 -07:00
vecreduce-fmul-legalization-soft-float.ll
[SelectionDAG] Add legalizations for VECREDUCE_SEQ_FMUL
2020-11-04 14:20:31 -06:00
vecreduce-fmul-legalization-strict.ll
[SelectionDAG] Add legalizations for VECREDUCE_SEQ_FMUL
2020-11-04 14:20:31 -06:00
vector-DAGCombine.ll
…
vector-extend-narrow.ll
[ARM][NFC] Make tests immune to better div optimizations
2018-10-30 22:08:13 +00:00
vector-load.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
vector-promotion.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
vector-spilling.ll
Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351
2019-12-24 16:27:51 -08:00
vector-store.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
vext.ll
Allow combining of extract_subvector to extract element
2020-01-24 10:50:26 -08:00
vfcmp.ll
[ARM][NFC] Replaced tab characters in test file vfcmp.ll.
2018-08-07 08:05:15 +00:00
vfloatintrinsics.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vfp-libcalls.ll
…
vfp-reg-stride.ll
…
vfp-regs-dwarf.ll
…
vfp.ll
[ARM] Generate vcmp instead of vcmpe
2019-10-08 08:25:42 +00:00
vget_lane.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vhadd.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vhsub.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vicmp-64.ll
…
vicmp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
virtregrewriter-subregliveness.mir
…
vld1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld2.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld-vst-upgrade.ll
…
vlddup.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
vldlane.ll
[ARM] Regenerate vldlane tests
2020-10-07 11:47:03 +01:00
vldm-liveness.ll
…
vldm-liveness.mir
[MIR][ARM] MachineOperand comments
2020-02-24 14:19:21 +00:00
vldm-sched-a9.ll
…
vldmia-sched.mir
…
vlldm-vlstm-uops.mir
[ARM] Describe defs/uses of VLLDM and VLSTM
2020-06-23 16:04:23 +01:00
vminmax.ll
[Arm] Do not lower vmax/vmin to Neon instructions
2020-03-10 10:48:48 +00:00
vminmaxnm-safe.ll
[NFC] Chec[^k] -> Check
2020-12-08 11:54:39 +00:00
vminmaxnm.ll
Generate FMINNAN/FMINNUM/FMAXNAN/FMAXNUM from SDAGBuilder.
2015-08-17 07:13:10 +00:00
vmla.ll
[ARM] Handle any extend whilst lowering mull
2021-01-06 10:51:12 +00:00
vmls.ll
[ARM] Handle any extend whilst lowering mull
2021-01-06 10:51:12 +00:00
vmov.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
vmul.ll
[ARM] Handle any extend whilst lowering mull
2021-01-06 10:51:12 +00:00
vneg.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vpadal.ll
…
vpadd.ll
Allow combining of extract_subvector to extract element
2020-01-24 10:50:26 -08:00
vpminmax.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vqadd.ll
[ARM] Replace arm_neon_vqadds with sadd_sat
2019-11-27 13:32:29 +00:00
vqdmul.ll
[ARM] Replace arm_neon_vqadds with sadd_sat
2019-11-27 13:32:29 +00:00
vqshl.ll
…
vqshrn.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vqsub.ll
[ARM] Replace arm_neon_vqadds with sadd_sat
2019-11-27 13:32:29 +00:00
vrec.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vrev.ll
[ARM] Add vrev32 NEON fp16 patterns
2019-11-04 13:37:01 +00:00
vrint.ll
[NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction
2018-04-13 12:45:12 +00:00
vsel-fp16.ll
…
vsel.ll
…
vselect_imax.ll
[ARM] VBIT/VBIF support added.
2020-07-16 11:25:53 +01:00
vshift.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vshiftins.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vshl.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vshll.ll
[SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors
2017-09-25 19:26:08 +00:00
vshrn.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vsra.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vst1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vst2.ll
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
2015-09-30 10:56:37 +00:00
vst3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vst4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vstlane.ll
…
vsub.ll
[ARM] Handle any extend whilst lowering addw/addl/subw/subl
2021-01-06 11:26:39 +00:00
vtbl.ll
[ARM] Use TableGen patterns to select vtbl. NFC.
2017-04-19 20:39:39 +00:00
vtrn.ll
[ARM][NFC] Replaced tab-characters in test file vtrn.ll
2018-08-08 14:42:11 +00:00
vuzp.ll
Allow combining of extract_subvector to extract element
2020-01-24 10:50:26 -08:00
vzip.ll
[DAGCombiner] narrow shuffle of concatenated vectors
2019-04-12 16:31:56 +00:00
warn-stack.ll
Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351
2019-12-24 15:57:33 -08:00
weak2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
weak.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
wide-compares.ll
[ARM] Fix CPSR liveness in tMOVCCr_pseudo lowering.
2018-11-07 21:08:13 +00:00
widen-vmovs.ll
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win32-ssp.ll
[CodeGen] Restore accessing __stack_chk_guard via a .refptr stub on mingw after 2518433f86
2020-12-07 09:35:12 +02:00
wrong-t2stmia-size-opt.ll
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
xray-armv6-attribute-instrumentation.ll
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xray-armv7-attribute-instrumentation.ll
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xray-tail-call-sled.ll
[XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address)
2020-04-24 08:35:43 -07:00
zero-cycle-zero.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
zext-logic-shift-load.ll
[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))
2018-04-07 23:36:10 +00:00
zextload_demandedbits.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00