83e2710eb0
It was discussed a few years ago and agreed that it makes sense to remove this assertion as other targets do not perform similar register size checking in inline assembly constraint logic, so the check just adds a needless barrier on AVR. This patch removes the assertion and removes 'XFAIL' from two Generic CodeGen tests for AVR as a result.
22 lines
545 B
LLVM
22 lines
545 B
LLVM
; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
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@G = common global i32 0, align 4
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define i32 @foo(i8* %p) nounwind uwtable {
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entry:
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%p.addr = alloca i8*, align 8
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%rv = alloca i32, align 4
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store i8* %p, i8** %p.addr, align 8
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store i32 0, i32* @G, align 4
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%0 = load i8*, i8** %p.addr, align 8
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; CHECK: blah
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%1 = call i32 asm "blah", "=r,r,~{memory}"(i8* %0) nounwind
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; CHECK: @G
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store i32 %1, i32* %rv, align 4
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%2 = load i32, i32* %rv, align 4
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%3 = load i32, i32* @G, align 4
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%add = add nsw i32 %2, %3
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ret i32 %add
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}
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