288f762b6f
NOTE: This patch was originally written by Anil Mahmud. His code has been rebased but otherwise left mostly unchanged. A new instructon on Power 10 allows for the materialization of 34 bit immediate values. This patch allows the compiler to take advantage of the new instruction in this situation. Reviewed By: amyk Differential Revision: https://reviews.llvm.org/D92879
291 lines
6.9 KiB
LLVM
291 lines
6.9 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK32
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; These test cases aim to test constant materialization using the pli instruction on Power10.
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define signext i32 @t_16BitsMinRequiring34Bits() {
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; CHECK-LABEL: t_16BitsMinRequiring34Bits:
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; CHECK: pli r3, 32768
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_16BitsMinRequiring34Bits:
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; CHECK32: pli r3, 32768
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; CHECK32-NEXT: blr
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entry:
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ret i32 32768
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}
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define signext i32 @t_16Bits() {
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; CHECK-LABEL: t_16Bits:
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; CHECK: pli r3, 62004
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_16Bits:
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; CHECK32: pli r3, 62004
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; CHECK32-NEXT: blr
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entry:
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ret i32 62004
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}
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define signext i32 @t_lt32gt16BitsNonShiftable() {
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; CHECK-LABEL: t_lt32gt16BitsNonShiftable:
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; CHECK: pli r3, 1193046
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_lt32gt16BitsNonShiftable:
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; CHECK32: pli r3, 1193046
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; CHECK32-NEXT: blr
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entry:
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ret i32 1193046
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}
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define signext i32 @t_32Bits() {
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; CHECK-LABEL: t_32Bits:
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; CHECK: pli r3, -231451016
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_32Bits:
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; CHECK32: pli r3, -231451016
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; CHECK32-NEXT: blr
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entry:
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ret i32 -231451016
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}
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define i64 @t_34BitsLargestPositive() {
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; CHECK-LABEL: t_34BitsLargestPositive:
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; CHECK: pli r3, 8589934591
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_34BitsLargestPositive:
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; CHECK32: li r3, 1
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; CHECK32-NEXT: li r4, -1
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; CHECK32-NEXT: blr
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entry:
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ret i64 8589934591
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}
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define i64 @t_neg34Bits() {
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; CHECK-LABEL: t_neg34Bits:
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; CHECK: pli r3, -8284514696
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_neg34Bits:
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; CHECK32: li r3, -2
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; CHECK32-NEXT: pli r4, 305419896
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; CHECK32-NEXT: blr
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entry:
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ret i64 -8284514696
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}
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define signext i32 @t_16BitsMinRequiring34BitsMinusOne() {
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; CHECK-LABEL: t_16BitsMinRequiring34BitsMinusOne:
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; CHECK: li r3, 32767
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_16BitsMinRequiring34BitsMinusOne:
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; CHECK32: li r3, 32767
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; CHECK32-NEXT: blr
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entry:
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ret i32 32767
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}
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define signext i32 @t_lt16Bits() {
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; CHECK-LABEL: t_lt16Bits:
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; CHECK: li r3, 291
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_lt16Bits:
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; CHECK32: li r3, 291
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; CHECK32-NEXT: blr
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entry:
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ret i32 291
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}
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define signext i32 @t_neglt16Bits() {
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; CHECK-LABEL: t_neglt16Bits:
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; CHECK: li r3, -3805
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_neglt16Bits:
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; CHECK32: li r3, -3805
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; CHECK32-NEXT: blr
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entry:
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ret i32 -3805
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}
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define signext i32 @t_neg16Bits() {
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; CHECK-LABEL: t_neg16Bits:
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; CHECK: li r3, -32204
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_neg16Bits:
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; CHECK32: li r3, -32204
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; CHECK32-NEXT: blr
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entry:
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ret i32 -32204
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}
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define signext i32 @t_lt32gt16BitsShiftable() {
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; CHECK-LABEL: t_lt32gt16BitsShiftable:
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; CHECK: lis r3, 18
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_lt32gt16BitsShiftable:
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; CHECK32: lis r3, 18
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; CHECK32-NEXT: blr
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entry:
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ret i32 1179648
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}
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define signext i32 @t_32gt16BitsShiftable() {
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; CHECK-LABEL: t_32gt16BitsShiftable:
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; CHECK: lis r3, -3532
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_32gt16BitsShiftable:
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; CHECK32: lis r3, -3532
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; CHECK32-NEXT: blr
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entry:
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ret i32 -231473152
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}
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define signext i32 @t_32BitsZero() {
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; CHECK-LABEL: t_32BitsZero:
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; CHECK: li r3, 0
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_32BitsZero:
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; CHECK32: li r3, 0
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; CHECK32-NEXT: blr
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entry:
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ret i32 0
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}
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define signext i32 @t_32BitsAllOnes() {
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; CHECK-LABEL: t_32BitsAllOnes:
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; CHECK: li r3, -1
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_32BitsAllOnes:
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; CHECK32: li r3, -1
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; CHECK32-NEXT: blr
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entry:
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ret i32 -1
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}
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define i64 @t_34BitsLargestPositivePlus() {
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; CHECK-LABEL: t_34BitsLargestPositivePlus:
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; CHECK: li r3, 1
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; CHECK-NEXT: rldic r3, r3, 33, 30
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_34BitsLargestPositivePlus:
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; CHECK32: li r3, 2
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; CHECK32-NEXT: li r4, 0
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; CHECK32-NEXT: blr
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entry:
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ret i64 8589934592
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}
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define i64 @t_34Bits() {
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; CHECK-LABEL: t_34Bits:
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; CHECK: lis r3, 25158
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; CHECK-NEXT: ori r3, r3, 35535
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; CHECK-NEXT: rldic r3, r3, 3, 30
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_34Bits:
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; CHECK32: li r3, 3
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; CHECK32-NEXT: pli r4, 305419896
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; CHECK32-NEXT: blr
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entry:
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ret i64 13190321784
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}
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define i64 @t_35Bits() {
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; CHECK-LABEL: t_35Bits:
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; CHECK: lis r3, -442
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; CHECK-NEXT: ori r3, r3, 35535
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; CHECK-NEXT: rldic r3, r3, 3, 29
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; CHECK-NEXT: blr
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; CHECK32-LABEL: t_35Bits:
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; CHECK32: li r3, 7
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; CHECK32-NEXT: pli r4, -231451016
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; CHECK32-NEXT: blr
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entry:
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ret i64 34128287352
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}
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; The load immediates resulting from phi-nodes are needed to test whether
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; li/lis is preferred to pli by the instruction selector.
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define dso_local void @t_phiNode() {
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; CHECK-LABEL: t_phiNode:
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; CHECK: lis r6, 18
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; CHECK-NEXT: li r5, 291
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; CHECK-NEXT: li r4, 0
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; CHECK-NEXT: cmpwi r3, 1
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; CHECK-NEXT: li r3, -1
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; CHECK: pli r6, 2147483647
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; CHECK-NEXT: pli r5, 1193046
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; CHECK-NEXT: pli r4, 32768
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; CHECK-NEXT: pli r3, -231451016
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; CHECK32-LABEL: t_phiNode:
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; CHECK32: lis r6, 18
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; CHECK32-NEXT: li r5, 291
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; CHECK32-NEXT: li r4, 0
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; CHECK32-NEXT: cmpwi r3, 1
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; CHECK32-NEXT: li r3, -1
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; CHECK32: pli r6, 2147483647
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; CHECK32-NEXT: pli r5, 1193046
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; CHECK32-NEXT: pli r4, 32768
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; CHECK32-NEXT: pli r3, -231451016
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entry:
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br label %while.body
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while.body: ; preds = %if.else.i, %entry
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br label %while.body.i
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while.body.i: ; preds = %sw.epilog.i, %while.body
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%a.1.i = phi i32 [ %a.2.i, %sw.epilog.i ], [ -1, %while.body ]
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%b.1.i = phi i32 [ %b.2.i, %sw.epilog.i ], [ 0, %while.body ]
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%c.1.i = phi i32 [ %c.2.i, %sw.epilog.i ], [ 291, %while.body ]
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%d.1.i = phi i32 [ %d.2.i, %sw.epilog.i ], [ 1179648, %while.body ]
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%0 = load i8, i8* null, align 1
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%cmp1.i = icmp eq i8 %0, 1
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br i1 %cmp1.i, label %if.then.i, label %if.else.i
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if.then.i: ; preds = %while.body.i
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switch i8 undef, label %sw.default.i [
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i8 3, label %sw.epilog.i
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i8 2, label %sw.bb1.i
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]
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sw.bb1.i: ; preds = %if.then.i
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br label %sw.epilog.i
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sw.default.i: ; preds = %if.then.i
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unreachable
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sw.epilog.i: ; preds = %sw.bb2.i, %sw.bb1.i, %if.then.i
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%a.2.i = phi i32 [ -231451016, %sw.bb1.i ], [ %a.1.i, %if.then.i ]
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%b.2.i = phi i32 [ 32768, %sw.bb1.i ], [ %b.1.i, %if.then.i ]
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%c.2.i = phi i32 [ 1193046, %sw.bb1.i ], [ %c.1.i, %if.then.i ]
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%d.2.i = phi i32 [ 2147483647, %sw.bb1.i ], [ %d.1.i, %if.then.i ]
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br label %while.body.i
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if.else.i: ; preds = %while.body.i
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call void @func2(i32 signext %a.1.i, i32 signext %b.1.i, i32 signext %c.1.i, i32 signext %d.1.i)
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br label %while.body
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}
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declare void @func2(i32, i32, i32, i32)
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