4a8e6ed2f7
This patch makes SLP and LV emit operations with initial vectors set to poison constant instead of undef. This is a part of efforts for using poison vector instead of undef to represent "doesn't care" vector. The goal is to make nice shufflevector optimizations valid that is currently incorrect due to the tricky interaction between undef and poison (see https://bugs.llvm.org/show_bug.cgi?id=44185 ). Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D94061
99 lines
3.6 KiB
LLVM
99 lines
3.6 KiB
LLVM
; RUN: opt < %s -mattr=avx -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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; RUN: opt -mcpu=skylake-avx512 -S -force-vector-width=8 -force-vector-interleave=1 -loop-vectorize < %s | FileCheck %s --check-prefix=SINK-GATHER
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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; CHECK-LABEL: predicated_sdiv_masked_load
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;
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; This test ensures that we don't scalarize the predicated load. Since the load
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; can be vectorized with predication, scalarizing it would cause its pointer
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; operand to become non-uniform.
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;
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; CHECK: vector.body:
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; CHECK: %wide.masked.load = call <2 x i32> @llvm.masked.load.v2i32.p0v2i32
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; CHECK: br i1 {{.*}}, label %[[IF0:.+]], label %[[CONT0:.+]]
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; CHECK: [[IF0]]:
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; CHECK: %[[T0:.+]] = extractelement <2 x i32> %wide.masked.load, i32 0
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; CHECK: %[[T1:.+]] = sdiv i32 %[[T0]], %x
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; CHECK: %[[T2:.+]] = insertelement <2 x i32> poison, i32 %[[T1]], i32 0
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; CHECK: br label %[[CONT0]]
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; CHECK: [[CONT0]]:
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; CHECK: %[[T3:.+]] = phi <2 x i32> [ poison, %vector.body ], [ %[[T2]], %[[IF0]] ]
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; CHECK: br i1 {{.*}}, label %[[IF1:.+]], label %[[CONT1:.+]]
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; CHECK: [[IF1]]:
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; CHECK: %[[T4:.+]] = extractelement <2 x i32> %wide.masked.load, i32 1
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; CHECK: %[[T5:.+]] = sdiv i32 %[[T4]], %x
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; CHECK: %[[T6:.+]] = insertelement <2 x i32> %[[T3]], i32 %[[T5]], i32 1
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; CHECK: br label %[[CONT1]]
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; CHECK: [[CONT1]]:
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; CHECK: phi <2 x i32> [ %[[T3]], %[[CONT0]] ], [ %[[T6]], %[[IF1]] ]
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; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
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define i32 @predicated_sdiv_masked_load(i32* %a, i32* %b, i32 %x, i1 %c) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ]
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%r = phi i32 [ 0, %entry ], [ %tmp7, %for.inc ]
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%tmp0 = getelementptr inbounds i32, i32* %a, i64 %i
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%tmp1 = load i32, i32* %tmp0, align 4
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br i1 %c, label %if.then, label %for.inc
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if.then:
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%tmp2 = getelementptr inbounds i32, i32* %b, i64 %i
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%tmp3 = load i32, i32* %tmp2, align 4
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%tmp4 = sdiv i32 %tmp3, %x
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%tmp5 = add nsw i32 %tmp4, %tmp1
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br label %for.inc
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for.inc:
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%tmp6 = phi i32 [ %tmp1, %for.body ], [ %tmp5, %if.then]
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%tmp7 = add i32 %r, %tmp6
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%i.next = add nuw nsw i64 %i, 1
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%cond = icmp eq i64 %i.next, 10000
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br i1 %cond, label %for.end, label %for.body
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for.end:
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%tmp8 = phi i32 [ %tmp7, %for.inc ]
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ret i32 %tmp8
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}
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; This test ensures that a load, which would have been widened otherwise is
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; instead scalarized if Cost-Model so decided as part of its
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; sink-scalar-operands optimization for predicated instructions.
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;
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; SINK-GATHER: vector.body:
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; SINK-GATHER: pred.udiv.if:
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; SINK-GATHER: %[[T0:.+]] = load i32, i32* %{{.*}}, align 4
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; SINK-GATHER: %{{.*}} = udiv i32 %[[T0]], %{{.*}}
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; SINK-GATHER: pred.udiv.continue:
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define i32 @scalarize_and_sink_gather(i32* %a, i1 %c, i32 %x, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ 0, %entry ], [ %i.next, %for.inc ]
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%r = phi i32 [ 0, %entry ], [ %tmp6, %for.inc ]
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%i7 = mul i64 %i, 777
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br i1 %c, label %if.then, label %for.inc
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if.then:
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%tmp0 = getelementptr inbounds i32, i32* %a, i64 %i7
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%tmp2 = load i32, i32* %tmp0, align 4
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%tmp4 = udiv i32 %tmp2, %x
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br label %for.inc
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for.inc:
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%tmp5 = phi i32 [ %x, %for.body ], [ %tmp4, %if.then]
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%tmp6 = add i32 %r, %tmp5
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%i.next = add nuw nsw i64 %i, 1
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%cond = icmp slt i64 %i.next, %n
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br i1 %cond, label %for.body, label %for.end
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for.end:
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%tmp7 = phi i32 [ %tmp6, %for.inc ]
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ret i32 %tmp7
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}
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