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clang-p2996/llvm/test/CodeGen/AMDGPU/GlobalISel
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Jay Foad 7c706af03b [AMDGPU] SIFoldOperands: clean up tryConstantFoldOp 
First clean up the strange API of tryConstantFoldOp where it took an
immediate operand value, but no indication of which operand it was the
value for.

Second clean up the loop that calls tryConstantFoldOp so that it does
not have to restart from the beginning every time it folds an
instruction.

This is NFCI but there are some minor changes caused by the order in
which things are folded.

Differential Revision: https://reviews.llvm.org/D100031
2021-05-06 09:55:22 +01:00
..
add_shl.ll
[AMDGPU] Make some VOP3 insts commutable
2021-04-28 13:59:08 -04:00
add.v2i16.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
amdgpu-irtranslator.ll
…
andn2.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
artifact-combiner-anyext.mir
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artifact-combiner-build-vector.mir
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artifact-combiner-concat-vectors.mir
…
artifact-combiner-extract.mir
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artifact-combiner-sext.mir
…
artifact-combiner-trunc.mir
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artifact-combiner-unmerge-values.mir
…
artifact-combiner-zext.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
ashr.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
atomic_optimizations_mul_one.ll
[AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer
2020-09-30 11:09:18 +02:00
bool-legalization.ll
[AMDGPU] Add volatile support to SIMemoryLegalizer
2021-01-09 00:52:33 +00:00
bswap.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
combine-add-nullptr.mir
[GlobalISel] Avoid making G_PTR_ADD with nullptr
2020-10-13 13:02:55 +02:00
combine-add-to-ptradd.mir
…
combine-amdgpu-cvt-f32-ubyte.mir
…
combine-ashr-narrow.mir
…
combine-ext-legalizer.mir
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combine-fcanonicalize.mir
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
combine-itofp.mir
…
combine-lshr-narrow.mir
…
combine-or-redundant.mir
[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x
2020-11-10 11:32:13 +01:00
combine-redundant-and.mir
[GlobalISel] Implement computeKnownBits for G_SEXT_INREG
2021-01-26 15:01:38 -08:00
combine-sext-inreg.mir
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
2021-04-30 14:10:50 +01:00
combine-shift-imm-chain-illegal-types.mir
[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands
2020-11-10 11:32:12 +01:00
combine-shift-imm-chain-shlsat.mir
[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands
2020-11-10 11:32:12 +01:00
combine-shift-imm-chain.ll
[AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands
2020-11-10 11:32:12 +01:00
combine-shift-of-shifted-logic-shlsat.mir
[AMDGPU][GlobalISel] Combine shift + logic + shift with constant operands
2020-11-10 11:32:13 +01:00
combine-shift-of-shifted-logic.ll
[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x
2020-11-10 11:32:13 +01:00
combine-shl-from-extend-narrow.postlegal.mir
…
combine-shl-from-extend-narrow.prelegal.mir
…
combine-shl-narrow.mir
…
combine-short-clamp.ll
[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices
2021-04-01 14:21:00 +03:00
combine-trunc-shl.mir
GlobalISel: Fix truncating shift amount in trunc (shl) combine
2020-09-23 09:07:50 -04:00
combine-urem-pow-2.mir
GlobalISel: Handle G_BUILD_VECTOR in isKnownToBeAPowerOfTwo
2021-03-22 14:20:35 -04:00
combine-zext-trunc.mir
Reland [GlobalISel] Combine zext(trunc x) to x
2021-03-05 11:05:37 +01:00
constant-bus-restriction.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
cvt_f32_ubyte.ll
[AMDGPU] SIFoldOperands: eagerly delete dead copies
2021-04-09 13:52:54 +01:00
divergent-control-flow.ll
Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
2021-03-05 11:05:37 +01:00
dummy-target.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
dynamic-alloca-divergent.ll
…
dynamic-alloca-uniform.ll
[AMDGPU] Remove unused tmp register
2021-02-02 17:17:54 +01:00
extractelement-stack-lower.ll
AMDGPU/GlobalISel: Improve private addressing mode matching
2021-03-11 10:23:35 -05:00
extractelement.i8.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
extractelement.i16.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
extractelement.i128.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
extractelement.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
fdiv.f16.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
fdiv.f32.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
fdiv.f64.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
flat-scratch-init.ll
[AMDGPU] Print SCRATCH_EN field after the kernel
2020-12-15 22:44:30 -08:00
flat-scratch.ll
[AMDGPU] Revise handling of preexisting waitcnt
2021-05-05 17:21:33 -07:00
floor.f64.ll
…
fma.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
fmax_legacy.ll
Revert "[AMDGPU] Insert waitcnt after returning from call"
2020-09-23 17:16:39 +02:00
fmed3.ll
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
fmin_legacy.ll
Revert "[AMDGPU] Insert waitcnt after returning from call"
2020-09-23 17:16:39 +02:00
fmul.v2f16.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
fp64-atomics-gfx90a.ll
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
fpow.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
frem.ll
[AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads
2021-05-05 15:18:19 -07:00
fshl.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
fshr.ll
[AMDGPU] SIFoldOperands: clean up tryConstantFoldOp
2021-05-06 09:55:22 +01:00
function-returns.ll
AMDGPU/GlobalISel: Add subtarget to a test
2021-02-28 10:29:25 -05:00
global-value.illegal.ll
…
global-value.ll
…
hip.extern.shared.array.ll
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image_ls_mipmap_zero.a16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
image_ls_mipmap_zero.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inline-asm.ll
Reapply "RegAllocFast: Rewrite and improve"
2020-09-30 10:35:25 -04:00
insertelement-stack-lower.ll
AMDGPU/GlobalISel: Improve private addressing mode matching
2021-03-11 10:23:35 -05:00
insertelement.i8.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
insertelement.i16.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
insertelement.large.ll
[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices
2021-04-01 14:21:00 +03:00
insertelement.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
inst-select-abs.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-add.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-add.s16.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-amdgcn.class.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-amdgcn.class.s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-amdgcn.cos.mir
…
inst-select-amdgcn.cos.s16.mir
…
inst-select-amdgcn.cvt.pk.i16.mir
…
inst-select-amdgcn.cvt.pk.u16.mir
…
inst-select-amdgcn.cvt.pknorm.i16.mir
…
inst-select-amdgcn.cvt.pknorm.u16.mir
…
inst-select-amdgcn.cvt.pkrtz.mir
…
inst-select-amdgcn.ds.swizzle.mir
…
inst-select-amdgcn.exp.mir
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inst-select-amdgcn.fmad.ftz.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fmed3.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fmed3.s16.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-amdgcn.fract.mir
…
inst-select-amdgcn.fract.s16.mir
…
inst-select-amdgcn.groupstaticsize.mir
…
inst-select-amdgcn.ldexp.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-amdgcn.ldexp.s16.mir
…
inst-select-amdgcn.mbcnt.lo.mir
…
inst-select-amdgcn.mul.u24.mir
…
inst-select-amdgcn.rcp.legacy.mir
…
inst-select-amdgcn.rcp.mir
…
inst-select-amdgcn.rcp.s16.mir
…
inst-select-amdgcn.readfirstlane.mir
…
inst-select-amdgcn.reloc.constant.mir
…
inst-select-amdgcn.rsq.clamp.mir
…
inst-select-amdgcn.rsq.legacy.mir
…
inst-select-amdgcn.rsq.mir
…
inst-select-amdgcn.rsq.s16.mir
…
inst-select-amdgcn.s.barrier.mir
…
inst-select-amdgcn.s.sendmsg.mir
…
inst-select-amdgcn.sffbh.mir
…
inst-select-amdgcn.sin.mir
…
inst-select-amdgcn.sin.s16.mir
…
inst-select-amdgpu-atomic-cmpxchg-flat.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-amdgpu-atomic-cmpxchg-global.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-amdgpu-ffbh-u32.mir
…
inst-select-and.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-anyext.mir
…
inst-select-ashr.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-ashr.s16.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-ashr.v2s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-atomic-cmpxchg-local.mir
…
inst-select-atomic-cmpxchg-region.mir
…
inst-select-atomicrmw-add-flat.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-atomicrmw-add-global.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-atomicrmw-fadd-local.mir
…
inst-select-atomicrmw-fadd-region.mir
…
inst-select-atomicrmw-xchg-local.mir
…
inst-select-atomicrmw-xchg-region.mir
…
inst-select-bitcast.mir
…
inst-select-bitreverse.mir
[AMDGPU] Better codegen for i64 bitreverse
2021-02-26 15:51:36 +00:00
inst-select-br.mir
…
inst-select-brcond.mir
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inst-select-bswap.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-build-vector-trunc.v2s16.mir
[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants
2021-01-20 11:54:53 +01:00
inst-select-build-vector.mir
…
inst-select-concat-vectors.mir
…
inst-select-constant.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-copy.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-ctlz-zero-undef.mir
…
inst-select-ctpop.mir
…
inst-select-cttz-zero-undef.mir
…
inst-select-extract-vector-elt.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-extract.mir
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inst-select-fabs.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fadd.s16.mir
…
inst-select-fadd.s32.mir
…
inst-select-fadd.s64.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-fcanonicalize.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fceil.mir
…
inst-select-fceil.s16.mir
…
inst-select-fcmp.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-fcmp.s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-fconstant.mir
…
inst-select-fexp2.mir
…
inst-select-ffloor.s16.mir
…
inst-select-ffloor.s32.mir
…
inst-select-ffloor.s64.mir
…
inst-select-fma.s32.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-fmad.s32.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-fmaxnum-ieee.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fmaxnum-ieee.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fmaxnum-ieee.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fmaxnum.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fmaxnum.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fmaxnum.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fminnum-ieee.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fminnum-ieee.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fminnum-ieee.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fminnum.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fminnum.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fminnum.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fmul.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fmul.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fneg.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-fptosi.mir
[AMDGPU] Add Fiji target in fptosi/fptoui instruction-select MIR tests.
2021-02-05 11:33:54 -06:00
inst-select-fptoui.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-fract.f64.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-frame-index.mir
…
inst-select-freeze.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-frint.mir
…
inst-select-frint.s16.mir
…
inst-select-fshr.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-icmp.mir
…
inst-select-icmp.s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-icmp.s64.mir
…
inst-select-implicit-def.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-insert-vector-elt.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-insert.mir
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
2021-04-30 14:10:50 +01:00
inst-select-insert.xfail.mir
…
inst-select-intrinsic-trunc.mir
…
inst-select-intrinsic-trunc.s16.mir
…
inst-select-inttoptr.mir
…
inst-select-load-atomic-flat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-load-atomic-global.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-load-atomic-local.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-load-constant.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-load-flat.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-load-global-saddr.mir
[AMDGPU] Improve global SADDR selection
2021-05-05 14:44:21 -07:00
inst-select-load-global.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-load-global.s96.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-load-local-128.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-load-local.mir
…
inst-select-load-private.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-load-smrd.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-lshr.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-lshr.s16.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-lshr.v2s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-merge-values.mir
…
inst-select-mul.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-or.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-pattern-add3.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-pattern-and-or.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-pattern-or3.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-pattern-smed3.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-pattern-smed3.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-pattern-umed3.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-pattern-umed3.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-pattern-xor3.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-phi.mir
…
inst-select-ptr-add.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-ptrmask.mir
…
inst-select-ptrtoint.mir
…
inst-select-returnaddress.mir
…
inst-select-scalar-packed.xfail.mir
…
inst-select-select.mir
…
inst-select-sext-inreg.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-sext.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-shl.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-shl.s16.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
inst-select-shl.v2s16.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-shuffle-vector.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-sitofp.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-smax.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-smin.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-smulh.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-store-atomic-flat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-store-atomic-local.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-store-flat.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-store-global.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-store-global.s96.mir
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
inst-select-store-local.mir
…
inst-select-store-private.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-sub.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-trunc.mir
…
inst-select-trunc.v2s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-uadde.gfx10.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-uadde.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-uaddo.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-uitofp.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-umax.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-umin.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-umulh.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
inst-select-unmerge-values.mir
…
inst-select-usube.gfx10.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-usube.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-usubo.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-xor.mir
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
inst-select-zext.mir
[AMDGPU] Add _e64 suffix to VOP3 Insts
2021-01-12 18:33:18 -05:00
irtranslator-amdgcn-sendmsg.ll
…
irtranslator-amdgpu_kernel-system-sgprs.ll
…
irtranslator-amdgpu_kernel.ll
IR: Have byref imply dereferenceable
2020-09-24 09:57:28 -04:00
irtranslator-amdgpu_ps.ll
…
irtranslator-amdgpu_vs.ll
…
irtranslator-atomicrmw.ll
…
irtranslator-call-implicit-args.ll
GlobalISel: Merge and cleanup more AMDGPU call lowering code
2021-03-02 17:31:13 -05:00
irtranslator-call-non-fixed.ll
GlobalISel: Merge and cleanup more AMDGPU call lowering code
2021-03-02 17:31:13 -05:00
irtranslator-call-return-values.ll
[AMDGPU] Fix large return values with amdgpu_gfx
2021-04-15 14:57:56 +02:00
irtranslator-call-sret.ll
GlobalISel: Partially fix handling of byval arguments
2021-03-12 09:01:53 -05:00
irtranslator-call.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
irtranslator-constantexpr.ll
…
irtranslator-constrained-fp.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-fast-math-flags.ll
…
irtranslator-fence.ll
…
irtranslator-fixed-function-abi-vgpr-args.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
irtranslator-function-args.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
irtranslator-getelementptr.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-indirect-call.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-inline-asm.ll
[AMDGPU] Set implicit arg attributes for indirect calls
2021-04-13 13:15:13 +00:00
irtranslator-memory-intrinsics.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-metadata.ll
…
irtranslator-ptrmask.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-readnone-intrinsic-callsite.ll
…
irtranslator-sat.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
irtranslator-struct-return-intrinsics.ll
…
lds-global-non-entry-func.ll
[AMDGPU] Rename "LDS lowering" pass name.
2021-04-14 20:19:53 +05:30
lds-global-value.ll
…
lds-misaligned-bug.ll
[AMDGPU] Only use ds_read/write_b128 for alignment >= 16
2021-04-08 08:12:05 +05:30
lds-relocs.ll
…
lds-size.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
lds-zero-initializer.ll
MCContext::reportError: don't call report_fatal_error
2020-12-20 23:23:12 -08:00
legalize-add.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-addrspacecast.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-amdgcn.if-invalid.mir
…
legalize-amdgcn.if.xfail.mir
…
legalize-amdgcn.rsq.clamp.mir
…
legalize-amdgcn.wavefrontsize.mir
…
legalize-and.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-anyext.mir
…
legalize-ashr.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-atomic-cmpxchg-with-success.mir
…
legalize-atomic-cmpxchg.mir
…
legalize-atomicrmw-add.mir
…
legalize-atomicrmw-and.mir
…
legalize-atomicrmw-fadd-global.mir
[AMDGPU][GlobalISel] Add support for global atomicrmw fadd
2021-03-31 11:13:00 +01:00
legalize-atomicrmw-fadd-local.mir
[AMDGPU][GlobalISel] Add support for global atomicrmw fadd
2021-03-31 11:13:00 +01:00
legalize-atomicrmw-max.mir
…
legalize-atomicrmw-min.mir
…
legalize-atomicrmw-nand.mir
…
legalize-atomicrmw-or.mir
…
legalize-atomicrmw-sub.mir
…
legalize-atomicrmw-umax.mir
…
legalize-atomicrmw-umin.mir
…
legalize-atomicrmw-xchg-flat.mir
…
legalize-atomicrmw-xchg.mir
…
legalize-atomicrmw-xor.mir
…
legalize-bitcast.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-bitreverse.mir
[AMDGPU] Better codegen for i64 bitreverse
2021-02-26 15:51:36 +00:00
legalize-block-addr.mir
…
legalize-brcond.mir
[AMDGPU] Remove fix up operand from SI_ELSE
2020-10-20 19:15:21 +09:00
legalize-bswap.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-build-vector-trunc.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-build-vector.mir
…
legalize-build-vector.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-concat-vectors.mir
…
legalize-constant.mir
…
legalize-ctlz-zero-undef.mir
…
legalize-ctlz.mir
…
legalize-ctpop.mir
…
legalize-cttz-zero-undef.mir
…
legalize-cttz.mir
…
legalize-extract-vector-elt.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-extract.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-fabs.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fadd.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fcanonicalize.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fceil.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fcmp.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fconstant.mir
…
legalize-fcopysign.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fcos.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fdiv.mir
AMDGPU: Use more accurate fast f64 fdiv
2021-01-21 10:51:36 -05:00
legalize-fexp2.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fexp.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-ffloor.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-flog2.mir
…
legalize-flog10.mir
…
legalize-flog.mir
…
legalize-fma.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fmad.s16.mir
…
legalize-fmad.s32.mir
…
legalize-fmad.s64.mir
…
legalize-fmaxnum.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fminnum.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fmul.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fneg.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fpext.mir
…
legalize-fpow.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fpowi.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fptosi.mir
AMDGPU/GlobalISel: Fix uitofp/sitofp with non-power-of-2 integers
2021-04-20 11:13:29 -04:00
legalize-fptoui.mir
AMDGPU/GlobalISel: Fix uitofp/sitofp with non-power-of-2 integers
2021-04-20 11:13:29 -04:00
legalize-fptrunc.mir
…
legalize-freeze.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-frint.mir
…
legalize-fshl.mir
GlobalISel: Lower funnel shifts
2021-03-23 09:11:17 -04:00
legalize-fshr.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fsin.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fsqrt.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-fsub.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-icmp.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-implicit-def-s1025.mir
…
legalize-implicit-def.mir
[GlobalISel] Fix CSEMIRBuilder silently allowing use-before-def.
2020-10-05 11:00:00 -07:00
legalize-insert-vector-elt.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-insert.mir
…
legalize-intrinsic-amdgcn-fdiv-fast.mir
…
legalize-intrinsic-round.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-intrinsic-trunc.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-inttoptr.mir
…
legalize-jump-table.mir
…
legalize-llvm.amdgcn.image.atomic.dim.a16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.dim.a16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.load.2d.d16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.load.2d.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.load.2darraymsaa.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.load.3d.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.sample.a16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.sample.g16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.image.store.2d.d16.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
legalize-llvm.amdgcn.s.buffer.load.mir
…
legalize-load-constant-32bit.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-load-constant.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-load-flat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-load-global.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-load-local.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-load-memory-metadata.mir
…
legalize-load-private.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-lshr.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-merge-values-build-vector.mir
…
legalize-merge-values.mir
…
legalize-mul.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-or.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-phi.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-ptr-add.mir
…
legalize-ptrmask.mir
…
legalize-ptrtoint.mir
…
legalize-sadde.mir
[GlobalISel] Implement widenScalar for carry-in add/sub
2021-01-28 17:06:24 -05:00
legalize-saddo.mir
[GlobalISel] Add sext(constant) -> constant artifact combine.
2021-02-03 14:10:08 -08:00
legalize-saddsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-sdiv.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-select.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-sext-inreg.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-sext.mir
…
legalize-sextload-constant-32bit.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-sextload-flat.mir
…
legalize-sextload-global.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-sextload-local.mir
…
legalize-sextload-private.mir
…
legalize-shl.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-shuffle-vector.mir
…
legalize-shuffle-vector.s16.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-sitofp.mir
…
legalize-smax.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-smin.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-smulh.mir
[GlobalISel][AMDGPU] Lower G_SMULH/G_UMULH
2020-09-23 22:25:29 -04:00
legalize-smulo.mir
[GlobalISel][AMDGPU] Lower G_UMULO/G_SMULO
2021-03-23 05:45:43 +00:00
legalize-srem.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-sshlsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-ssube.mir
[GlobalISel] Implement widenScalar for carry-in add/sub
2021-01-28 17:06:24 -05:00
legalize-ssubo.mir
[GlobalISel] Add sext(constant) -> constant artifact combine.
2021-02-03 14:10:08 -08:00
legalize-ssubsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-store-global.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-store.mir
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
2021-04-30 14:10:50 +01:00
legalize-sub.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-trunc.mir
…
legalize-uadde.mir
[GlobalISel] Implement widenScalar for carry-in add/sub
2021-01-28 17:06:24 -05:00
legalize-uaddo.mir
Revert "Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method""
2021-01-25 16:22:22 -08:00
legalize-uaddsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-udiv.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-uitofp.mir
…
legalize-umax.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-umin.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-umulh.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-umulo.mir
[GlobalISel][AMDGPU] Lower G_UMULO/G_SMULO
2021-03-23 05:45:43 +00:00
legalize-unmerge-values.mir
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
2021-04-30 14:10:50 +01:00
legalize-urem.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-ushlsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-usube.mir
[GlobalISel] Implement widenScalar for carry-in add/sub
2021-01-28 17:06:24 -05:00
legalize-usubo.mir
Revert "Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method""
2021-01-25 16:22:22 -08:00
legalize-usubsat.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
legalize-xor.mir
GlobalISel: Use unmerge when copying wide vectors to result registers
2020-09-24 15:19:51 -04:00
legalize-zext.mir
…
legalize-zextload-constant-32bit.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-zextload-flat.mir
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
legalize-zextload-global.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
legalize-zextload-local.mir
…
legalize-zextload-private.mir
…
llvm.amdgcn.atomic.dec.ll
[AMDGPU] Optimize waitcnt insertion for flat memory operations
2020-10-20 22:55:12 +00:00
llvm.amdgcn.atomic.inc.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.ballot.i32.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.ballot.i64.ll
…
llvm.amdgcn.dispatch.id.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
llvm.amdgcn.dispatch.ptr.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
llvm.amdgcn.div.fmas.ll
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
llvm.amdgcn.div.scale.ll
[AMDGPU] Update subtarget features for new target ID support
2021-01-26 11:25:51 -08:00
llvm.amdgcn.ds.append.ll
…
llvm.amdgcn.ds.consume.ll
…
llvm.amdgcn.ds.fadd.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
llvm.amdgcn.ds.fmax.ll
Revert "[AMDGPU] Insert waitcnt after returning from call"
2020-09-23 17:16:39 +02:00
llvm.amdgcn.ds.fmin.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
llvm.amdgcn.ds.gws.barrier.ll
…
llvm.amdgcn.ds.gws.init.ll
…
llvm.amdgcn.ds.gws.sema.br.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.ds.gws.sema.release.all.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.ds.gws.sema.v.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.ds.ordered.add.gfx10.ll
…
llvm.amdgcn.ds.ordered.add.ll
…
llvm.amdgcn.ds.ordered.swap.ll
…
llvm.amdgcn.end.cf.i32.ll
Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
2021-03-05 11:05:37 +01:00
llvm.amdgcn.end.cf.i64.ll
Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
2021-03-05 11:05:37 +01:00
llvm.amdgcn.fdot2.ll
[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants
2021-01-20 11:54:53 +01:00
llvm.amdgcn.fmul.legacy.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.global.atomic.csub.ll
[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices
2021-04-01 14:21:00 +03:00
llvm.amdgcn.global.atomic.fadd-with-ret.ll
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
llvm.amdgcn.global.atomic.fadd.ll
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
llvm.amdgcn.icmp.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.if.break.i32.ll
[AMDGPU] Add volatile support to SIMemoryLegalizer
2021-01-09 00:52:33 +00:00
llvm.amdgcn.if.break.i64.ll
[AMDGPU] Add volatile support to SIMemoryLegalizer
2021-01-09 00:52:33 +00:00
llvm.amdgcn.image.atomic.dim.a16.ll
[AMDGPU] Make some VOP3 insts commutable
2021-04-28 13:59:08 -04:00
llvm.amdgcn.image.atomic.dim.ll
AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return
2021-04-29 20:56:03 +02:00
llvm.amdgcn.image.atomic.dim.mir
AMDGPU/GlobalISel: Fix selection of image intrinsics with unused return
2021-04-29 20:56:03 +02:00
llvm.amdgcn.image.gather4.a16.dim.ll
[AMDGPU] Make some VOP3 insts commutable
2021-04-28 13:59:08 -04:00
llvm.amdgcn.image.gather4.dim.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.image.gather4.o.dim.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.image.getresinfo.a16.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.image.getresinfo.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.image.load.1d.d16.ll
[AMDGPU][GlobalISel] Run SIAddImgInit
2021-01-21 15:54:54 +00:00
llvm.amdgcn.image.load.1d.ll
[AMDGPU] Add some image tests with enable-prt-strict-null disabled. NFC.
2021-03-31 17:27:20 +01:00
llvm.amdgcn.image.load.2d.ll
[AMDGPU][GlobalISel] Run SIAddImgInit
2021-01-21 15:54:54 +00:00
llvm.amdgcn.image.load.2darraymsaa.a16.ll
[AMDGPU][GlobalISel] Run SIAddImgInit
2021-01-21 15:54:54 +00:00
llvm.amdgcn.image.load.2darraymsaa.ll
[AMDGPU][GlobalISel] Run SIAddImgInit
2021-01-21 15:54:54 +00:00
llvm.amdgcn.image.load.3d.a16.ll
[AMDGPU][GlobalISel] Run SIAddImgInit
2021-01-21 15:54:54 +00:00
llvm.amdgcn.image.load.3d.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.image.sample.g16.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.image.sample.ltolz.a16.ll
[AMDGPU] Make some VOP3 insts commutable
2021-04-28 13:59:08 -04:00
llvm.amdgcn.image.sample.ltolz.ll
Revert "[AMDGPU] Insert waitcnt after returning from call"
2020-09-23 17:16:39 +02:00
llvm.amdgcn.image.store.2d.d16.ll
[AMDGPU] Update subtarget features for new target ID support
2021-01-26 11:25:51 -08:00
llvm.amdgcn.image.store.2d.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.implicit.buffer.ptr.ll
…
llvm.amdgcn.init.exec.ll
…
llvm.amdgcn.init.exec.wave32.ll
…
llvm.amdgcn.interp.p1.f16.ll
…
llvm.amdgcn.intersect_ray.ll
[AMDGPU] Don't check for VMEM hazards on GFX10
2021-03-04 21:44:56 +00:00
llvm.amdgcn.is.private.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
llvm.amdgcn.is.shared.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
llvm.amdgcn.kernarg.segment.ptr.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.mov.dpp8.ll
…
llvm.amdgcn.mov.dpp.ll
[AMDGPU][MC] Corrected bound_ctrl for compatibility with sp3
2021-02-22 14:59:40 +03:00
llvm.amdgcn.permlane.ll
…
llvm.amdgcn.queue.ptr.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
llvm.amdgcn.raw.buffer.atomic.add.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
llvm.amdgcn.raw.buffer.atomic.fadd.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.load.format.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.load.format.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.load.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.store.format.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.store.format.f32.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.buffer.store.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.tbuffer.load.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.tbuffer.load.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.tbuffer.store.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.tbuffer.store.i8.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.raw.tbuffer.store.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.rsq.clamp.ll
…
llvm.amdgcn.s.buffer.load.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.s.setreg.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.s.sleep.ll
…
llvm.amdgcn.sbfe.ll
…
llvm.amdgcn.sdot2.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.sdot4.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.sdot8.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.set.inactive.ll
Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
2021-03-05 11:05:37 +01:00
llvm.amdgcn.softwqm.ll
…
llvm.amdgcn.struct.buffer.atomic.add.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
llvm.amdgcn.struct.buffer.atomic.fadd.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.load.format.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.load.format.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.load.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.store.format.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.store.format.f32.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.buffer.store.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.tbuffer.load.f16.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.struct.tbuffer.load.ll
[AMDGPU] Use single cache policy operand
2021-03-15 13:00:59 -07:00
llvm.amdgcn.trig.preop.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
llvm.amdgcn.ubfe.ll
…
llvm.amdgcn.udot2.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.udot4.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.udot8.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.update.dpp.ll
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
llvm.amdgcn.workgroup.id.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
llvm.amdgcn.workitem.id.ll
[AMDGPU] Set implicit arg attributes for indirect calls
2021-04-13 13:15:13 +00:00
llvm.amdgcn.wqm.demote.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
llvm.amdgcn.wqm.ll
…
llvm.amdgcn.wqm.vote.ll
…
llvm.amdgcn.writelane.ll
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
2020-12-02 10:11:42 +00:00
llvm.amdgcn.wwm.ll
[AMDGPU] Rename amdgcn_wwm to amdgcn_strict_wwm
2021-03-03 09:33:57 +01:00
llvm.powi.ll
…
llvm.trap.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
load-constant.96.ll
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
load-local.96.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
load-local.128.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
load-unaligned.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
localizer.ll
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
lshr.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
memory-legalizer-atomic-fence.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
merge-buffer-stores.ll
[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset
2021-01-28 11:20:09 +01:00
minmaxabs.ll
…
mubuf-global.ll
[AMDGPU] Correct rmw atomics s_waitcnt generation
2021-02-17 01:32:29 +00:00
mul.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
mul.v2i16.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
no-cse-nonlocal-convergent-instrs.mir
[MachineCSE][NFC]: Refactor and comment on preventing CSE for isConvergent instrs
2021-05-05 14:22:03 -07:00
no-legalize-atomic.mir
…
non-entry-alloca.ll
[AMDGPU] Set implicit arg attributes for indirect calls
2021-04-13 13:15:13 +00:00
orn2.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
postlegalizer-combiner-divrem.mir
GlobalISel: Try to combine G_[SU]DIV and G_[SU]REM
2021-03-10 18:46:07 +05:30
postlegalizercombiner-and.mir
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
postlegalizercombiner-select.mir
…
prelegalizer-combiner-divrem.mir
GlobalISel: Try to combine G_[SU]DIV and G_[SU]REM
2021-03-10 18:46:07 +05:30
read_register.ll
…
readcyclecounter.ll
…
regbankcombiner-smed3.mir
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
regbankcombiner-umed3.mir
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
regbankselect-add.s16.mir
…
regbankselect-add.s32.mir
…
regbankselect-add.v2s16.mir
…
regbankselect-amdgcn-exp-compr.mir
…
regbankselect-amdgcn-exp.mir
…
regbankselect-amdgcn-s-buffer-load.mir
…
regbankselect-amdgcn.ballot.i64.mir
…
regbankselect-amdgcn.class.mir
…
regbankselect-amdgcn.cvt.pkrtz.mir
…
regbankselect-amdgcn.div.fmas.mir
…
regbankselect-amdgcn.div.scale.mir
…
regbankselect-amdgcn.ds.append.mir
…
regbankselect-amdgcn.ds.bpermute.mir
…
regbankselect-amdgcn.ds.consume.mir
…
regbankselect-amdgcn.ds.gws.init.mir
…
regbankselect-amdgcn.ds.gws.sema.v.mir
…
regbankselect-amdgcn.ds.ordered.add.mir
…
regbankselect-amdgcn.ds.ordered.swap.mir
…
regbankselect-amdgcn.ds.permute.mir
…
regbankselect-amdgcn.ds.swizzle.mir
…
regbankselect-amdgcn.else.32.mir
…
regbankselect-amdgcn.else.64.mir
…
regbankselect-amdgcn.fcmp.mir
…
regbankselect-amdgcn.fmul.legacy.mir
…
regbankselect-amdgcn.groupstaticsize.mir
…
regbankselect-amdgcn.icmp.mir
…
regbankselect-amdgcn.image.load.1d.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
regbankselect-amdgcn.image.sample.1d.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
regbankselect-amdgcn.interp.mov.mir
…
regbankselect-amdgcn.interp.p1.f16.mir
…
regbankselect-amdgcn.interp.p1.mir
…
regbankselect-amdgcn.interp.p2.f16.mir
…
regbankselect-amdgcn.interp.p2.mir
…
regbankselect-amdgcn.kernarg.segment.ptr.mir
…
regbankselect-amdgcn.kill.mir
…
regbankselect-amdgcn.live.mask.mir
[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic
2021-02-15 08:45:46 +09:00
regbankselect-amdgcn.mfma.gfx90a.mir
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
regbankselect-amdgcn.mfma.mir
…
regbankselect-amdgcn.ps.live.mir
…
regbankselect-amdgcn.raw.buffer.load.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
regbankselect-amdgcn.readfirstlane.mir
…
regbankselect-amdgcn.readlane.mir
…
regbankselect-amdgcn.s.buffer.load.ll
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
regbankselect-amdgcn.s.buffer.load.mir
AMDGPU/GlobalISel: Fix negative offset folding for buffer_load
2021-04-27 14:45:22 +02:00
regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
…
regbankselect-amdgcn.s.getpc.mir
…
regbankselect-amdgcn.s.getreg.mir
…
regbankselect-amdgcn.s.memrealtime.mir
…
regbankselect-amdgcn.s.memtime.mir
…
regbankselect-amdgcn.s.sendmsg.mir
…
regbankselect-amdgcn.s.sendmsghalt.mir
…
regbankselect-amdgcn.struct.buffer.load.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
regbankselect-amdgcn.struct.buffer.store.ll
GlobalISel: Merge some AMDGPU ABI lowering code to generic code
2021-02-18 17:26:55 -05:00
regbankselect-amdgcn.update.dpp.mir
…
regbankselect-amdgcn.wqm.demote.mir
[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic
2021-02-15 08:45:46 +09:00
regbankselect-amdgcn.wqm.mir
…
regbankselect-amdgcn.wqm.vote.mir
…
regbankselect-amdgcn.writelane.mir
…
regbankselect-amdgcn.wwm.mir
[AMDGPU] Rename amdgcn_wwm to amdgcn_strict_wwm
2021-03-03 09:33:57 +01:00
regbankselect-amdgpu-ffbh-u32.mir
…
regbankselect-and-s1.mir
…
regbankselect-and.mir
…
regbankselect-anyext.mir
…
regbankselect-ashr.mir
[AMDGPU][GlobalISel] Fix v2s16 right shifts
2021-02-04 17:04:32 +00:00
regbankselect-atomic-cmpxchg.mir
…
regbankselect-atomicrmw-add.mir
…
regbankselect-atomicrmw-and.mir
…
regbankselect-atomicrmw-fadd.mir
…
regbankselect-atomicrmw-max.mir
…
regbankselect-atomicrmw-min.mir
…
regbankselect-atomicrmw-or.mir
…
regbankselect-atomicrmw-sub.mir
…
regbankselect-atomicrmw-umax.mir
…
regbankselect-atomicrmw-umin.mir
…
regbankselect-atomicrmw-xchg.mir
…
regbankselect-atomicrmw-xor.mir
…
regbankselect-bitcast.mir
…
regbankselect-bitreverse.mir
[AMDGPU] Better codegen for i64 bitreverse
2021-02-26 15:51:36 +00:00
regbankselect-block-addr.mir
…
regbankselect-brcond.mir
…
regbankselect-bswap.mir
…
regbankselect-build-vector-trunc.mir
…
regbankselect-build-vector-trunc.v2s16.mir
…
regbankselect-build-vector.mir
…
regbankselect-concat-vector.mir
…
regbankselect-constant.mir
…
regbankselect-copy.mir
…
regbankselect-ctlz-zero-undef.mir
…
regbankselect-ctpop.mir
…
regbankselect-cttz-zero-undef.mir
…
regbankselect-default.mir
…
regbankselect-dyn-stackalloc.mir
…
regbankselect-extract-vector-elt.mir
…
regbankselect-extract.mir
…
regbankselect-fabs.mir
…
regbankselect-fadd.mir
…
regbankselect-fcanonicalize.mir
…
regbankselect-fceil.mir
…
regbankselect-fcmp.mir
…
regbankselect-fexp2.mir
…
regbankselect-flog2.mir
…
regbankselect-fma.mir
…
regbankselect-fmul.mir
…
regbankselect-fneg.mir
…
regbankselect-fpext.mir
…
regbankselect-fptosi.mir
…
regbankselect-fptoui.mir
…
regbankselect-fptrunc.mir
…
regbankselect-frame-index.mir
…
regbankselect-freeze.mir
…
regbankselect-frint.mir
…
regbankselect-fshr.mir
…
regbankselect-fsqrt.mir
…
regbankselect-fsub.mir
…
regbankselect-icmp.mir
…
regbankselect-icmp.s16.mir
…
regbankselect-illegal-copy.mir
…
regbankselect-insert-vector-elt.mir
…
regbankselect-insert.mir
…
regbankselect-intrinsic-trunc.mir
…
regbankselect-inttoptr.mir
…
regbankselect-load.mir
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
2021-04-30 14:10:50 +01:00
regbankselect-lshr.mir
[AMDGPU][GlobalISel] Fix v2s16 right shifts
2021-02-04 17:04:32 +00:00
regbankselect-merge-values.mir
…
regbankselect-mul.mir
…
regbankselect-or.mir
…
regbankselect-phi-s1.mir
…
regbankselect-phi.mir
…
regbankselect-ptr-add.mir
…
regbankselect-ptrmask.mir
…
regbankselect-ptrtoint.mir
…
regbankselect-reg-sequence.mir
…
regbankselect-sadde.mir
…
regbankselect-select.mir
…
regbankselect-sext-inreg.mir
…
regbankselect-sext.mir
…
regbankselect-sextload.mir
…
regbankselect-shl.mir
…
regbankselect-shuffle-vector.mir
…
regbankselect-sitofp.mir
…
regbankselect-smax.mir
[AMDGPU][GlobalISel] Use scalar min/max instructions
2021-02-04 17:04:32 +00:00
regbankselect-smin.mir
[AMDGPU][GlobalISel] Use scalar min/max instructions
2021-02-04 17:04:32 +00:00
regbankselect-smulh.mir
…
regbankselect-split-scalar-load-metadata.mir
[mir] Change 'undef' for MMO base addresses to 'unknown-address'
2021-03-10 16:46:44 -08:00
regbankselect-ssube.mir
…
regbankselect-sub.mir
…
regbankselect-trunc.mir
…
regbankselect-uadde.mir
…
regbankselect-uaddo.mir
…
regbankselect-uitofp.mir
…
regbankselect-umax.mir
[AMDGPU][GlobalISel] Use scalar min/max instructions
2021-02-04 17:04:32 +00:00
regbankselect-umin.mir
[AMDGPU][GlobalISel] Use scalar min/max instructions
2021-02-04 17:04:32 +00:00
regbankselect-umulh.mir
…
regbankselect-unmerge-values.mir
…
regbankselect-usube.mir
…
regbankselect-usubo.mir
…
regbankselect-waterfall-agpr.mir
…
regbankselect-widen-scalar-loads.mir
[AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads
2021-05-05 15:18:19 -07:00
regbankselect-xor.mir
…
regbankselect-zext.mir
…
regbankselect-zextload.mir
…
regbankselect.mir
…
ret.ll
…
roundeven.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
saddsat.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
sdiv.i32.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
sdiv.i64.ll
[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x
2020-11-10 11:32:13 +01:00
shader-epilogs.ll
…
shl-ext-reduce.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
shl.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
shlN_add.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00
smed3.ll
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
smrd.ll
[NFC] Removed unused prefixes in CodeGen/AMDGPU/GlobalISel
2021-01-05 12:57:17 -08:00
srem.i32.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
srem.i64.ll
[GlobalISel] Add combine for (x | mask) -> x when (x | mask) == x
2020-11-10 11:32:13 +01:00
ssubsat.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
store-local.96.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
store-local.128.ll
[AMDGPU] Experiments show that the GCNRegBankReassign pass significantly impacts
2021-04-26 17:21:49 -04:00
trunc.ll
…
uaddsat.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
udiv.i32.ll
AMDGPU: Update AMDHSA code object version handling
2020-10-14 13:04:27 -04:00
udiv.i64.ll
[GISel]: Few InsertVecElt combines
2020-10-28 12:27:07 -07:00
umed3.ll
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
urem.i32.ll
AMDGPU/GlobalISel: Enable CSE in pre-legalizer combiner
2021-03-21 10:07:37 -04:00
urem.i64.ll
AMDGPU/GlobalISel: Enable CSE in pre-legalizer combiner
2021-03-21 10:07:37 -04:00
usubsat.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
widen-i8-i16-scalar-loads.ll
[AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads
2021-05-05 15:18:19 -07:00
write_register.ll
…
xnor.ll
GlobalISel: Use DAG call lowering infrastructure in a more compatible way
2021-05-05 17:35:02 -04:00
zextload.ll
[AMDGPU] Extend gfx10 test coverage. NFC.
2021-03-29 11:13:55 +02:00