8638c897f4
Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
22 lines
947 B
LLVM
22 lines
947 B
LLVM
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s
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; Regression test for an ISel failure when a splatted load had more
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; than one use. The main tests for load_splat are in simd-offset.ll.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: load_splat:
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; CHECK-NEXT: .functype load_splat (i32, i32) -> (i32)
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; CHECK-NEXT: i32.load8_u $[[E:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: v128.load8_splat $push[[V:[0-9]+]]=, 0($0){{$}}
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; CHECK-NEXT: v128.store 0($1), $pop[[V]]{{$}}
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; CHECK-NEXT: return $[[E]]{{$}}
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define i8 @load_splat(i8* %p, <16 x i8>* %out) {
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%e = load i8, i8* %p
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%v1 = insertelement <16 x i8> undef, i8 %e, i32 0
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%v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
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store <16 x i8> %v2, <16 x i8>* %out
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ret i8 %e
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}
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