0a2672bb43
This adds the software division routines for the Windows RTABI. These are not expected to be used often though as most modern Windows ARM capable targets support hardware division. In the case that the target CPU doesnt support hardware division, this will be the fallback. llvm-svn: 243952
112 lines
2.0 KiB
LLVM
112 lines
2.0 KiB
LLVM
; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
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; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
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define arm_aapcs_vfpcc i32 @sdiv32(i32 %divisor, i32 %divident) {
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entry:
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%div = sdiv i32 %divident, %divisor
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ret i32 %div
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}
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; CHECK-LABEL: sdiv32
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; CHECK: b __rt_sdiv
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define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) {
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entry:
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%div = sdiv i64 %divident, %divisor
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ret i64 %div
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}
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; CHECK-LABEL: sdiv64
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; CHECK: bl __rt_sdiv64
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define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) {
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entry:
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%div = udiv i32 %divident, %divisor
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ret i32 %div
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}
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; CHECK-LABEL: udiv32
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; CHECK: b __rt_udiv
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define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) {
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entry:
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%div = udiv i64 %divident, %divisor
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ret i64 %div
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}
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; CHECK-LABEL: udiv64
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; CHECK: bl __rt_udiv64
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define arm_aapcs_vfpcc i64 @stoi64(float %f) {
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entry:
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%conv = fptosi float %f to i64
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ret i64 %conv
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}
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; CHECK-LABEL: stoi64
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; CHECK: bl __stoi64
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define arm_aapcs_vfpcc i64 @stou64(float %f) {
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entry:
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%conv = fptoui float %f to i64
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ret i64 %conv
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}
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; CHECK-LABEL: stou64
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; CHECK: bl __stou64
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define arm_aapcs_vfpcc float @i64tos(i64 %i64) {
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entry:
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%conv = sitofp i64 %i64 to float
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ret float %conv
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}
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; CHECK-LABEL: i64tos
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; CHECK: bl __i64tos
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define arm_aapcs_vfpcc float @u64tos(i64 %u64) {
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entry:
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%conv = uitofp i64 %u64 to float
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ret float %conv
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}
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; CHECK-LABEL: u64tos
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; CHECK: bl __u64tos
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define arm_aapcs_vfpcc i64 @dtoi64(double %d) {
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entry:
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%conv = fptosi double %d to i64
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ret i64 %conv
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}
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; CHECK-LABEL: dtoi64
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; CHECK: bl __dtoi64
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define arm_aapcs_vfpcc i64 @dtou64(double %d) {
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entry:
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%conv = fptoui double %d to i64
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ret i64 %conv
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}
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; CHECK-LABEL: dtou64
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; CHECK: bl __dtou64
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define arm_aapcs_vfpcc double @i64tod(i64 %i64) {
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entry:
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%conv = sitofp i64 %i64 to double
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ret double %conv
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}
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; CHECK-LABEL: i64tod
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; CHECK: bl __i64tod
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define arm_aapcs_vfpcc double @u64tod(i64 %i64) {
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entry:
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%conv = uitofp i64 %i64 to double
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ret double %conv
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}
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; CHECK-LABEL: u64tod
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; CHECK: bl __u64tod
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