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992fbce4e9b034e752dcb4e1be0306b49bbc6b19
clang-p2996/llvm/test/CodeGen
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Stanislav Mekhanoshin 992fbce4e9 [AMDGPU] copyPhysReg() for 16 bit SGPR subregs 
Differential Revision: https://reviews.llvm.org/D78255
2020-04-17 11:59:39 -07:00
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AArch64
[llvm][CodeGen] Addressing modes for SVE stN.
2020-04-17 19:31:44 +01:00
AMDGPU
[AMDGPU] copyPhysReg() for 16 bit SGPR subregs
2020-04-17 11:59:39 -07:00
ARC
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ARM
[ARM] Mir test for machine sinking multiple def instructions. NFC
2020-04-16 20:58:14 +01:00
AVR
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BPF
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
Generic
[mir-strip-debug] Optionally preserve debug info that wasn't from debugify/mir-debugify
2020-04-10 15:24:14 -07:00
Hexagon
[Pipeliner] Fix the bug in pragma that disables the pipeliner.
2020-04-10 12:52:16 -05:00
Inputs
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Lanai
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Mips
[MIR] Add comments to INLINEASM immediate flag MachineOperands
2020-04-16 13:46:14 +02:00
MIR
[MIR] Add comments to INLINEASM immediate flag MachineOperands
2020-04-16 13:46:14 +02:00
MSP430
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NVPTX
[llvm] Fix missing FileCheck directive colons
2020-04-06 09:59:08 -06:00
PowerPC
[PowerPC][Future] More support for PCRel addressing for global values
2020-04-17 11:06:13 -05:00
RISCV
[RISCV][AsmParser] Implement .option (no)pic
2020-04-17 12:08:30 +00:00
SPARC
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SystemZ
[SystemZ] Bugfix in adjustSubwordCmp()
2020-04-15 12:58:39 +02:00
Thumb
[ARM] unwinding .pad instructions missing in execute-only prologue
2020-04-07 11:51:59 +01:00
Thumb2
[ARM][MVE] Add VHADD and VHSUB patterns
2020-04-17 07:45:15 +01:00
VE
[VE] Update integer arithmetic instructions
2020-04-15 09:47:51 +02:00
WebAssembly
[WebAssembly] Add int32 DW_OP_WASM_location variant
2020-04-16 16:32:17 -07:00
WinCFGuard
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WinEH
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X86
[x86] add/adjust tests for FP<->int casts; NFC
2020-04-17 08:22:42 -04:00
XCore
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