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Sanjay Patel 8652c53d29 [DAG] propagate FMF for all FPMathOperators 
This is a simple hack based on what's proposed in D37686, but we can extend it if needed in follow-ups. 
It gets us most of the FMF functionality that we want without adding any state bits to the flags. It 
also intentionally leaves out non-FMF flags (nsw, etc) to minimize the patch.

It should provide a superset of the functionality from D46563 - the extra tests show propagation and 
codegen diffs for fcmp, vecreduce, and FP libcalls.

The PPC log2() test shows the limits of this most basic approach - we only applied 'afn' to the last 
node created for the call. AFAIK, there aren't any libcall optimizations based on the flags currently, 
so that shouldn't make any difference.

Differential Revision: https://reviews.llvm.org/D46854

llvm-svn: 332358
2018-05-15 14:16:24 +00:00
..
GlobalISel
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
2018-05-05 21:19:59 +00:00
Windows
[ARM] Back up R4 and LR if calling the stack probe function
2018-05-14 21:32:52 +00:00
2006-11-10-CycleInDAG.ll
…
2007-01-19-InfiniteLoop.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
2007-03-07-CombinerCrash.ll
…
2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
…
2007-03-27-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-03-30-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-04-02-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-04-03-PEIBug.ll
…
2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-14-InlineAsmCstCrash.ll
…
2007-05-14-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-22-tailmerge-3.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2007-05-23-BadPreIndexedStore.ll
…
2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
…
2008-03-05-SxtInRegBug.ll
…
2008-03-07-RegScavengerAssert.ll
…
2008-04-04-ScavengerAssert.ll
…
2008-04-10-ScavengerAssert.ll
…
2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
…
2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2008-08-07-AsmPrintBug.ll
…
2008-09-17-CoalescerBug.ll
…
2008-11-18-ScavengerAssert.ll
…
2009-02-16-SpillerBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-02-22-SoftenFloatVaArg.ll
…
2009-02-27-SpillerBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-03-07-SpillerBug.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2009-03-09-AddrModeBug.ll
…
2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
…
2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
…
2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
…
2009-06-19-RegScavengerAssert.ll
…
2009-06-22-CoalescerBug.ll
…
2009-06-30-RegScavengerAssert2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert3.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert4.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert5.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-06-30-RegScavengerAssert.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-07-01-CommuteBug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-07-09-asm-p-constraint.ll
…
2009-07-18-RewriterBug.ll
…
2009-07-22-ScavengerAssert.ll
…
2009-07-22-SchedulerAssert.ll
…
2009-07-29-VFP3Registers.ll
…
2009-08-02-RegScavengerAssert-Neon.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-04-RegScavengerAssert-2.ll
…
2009-08-04-RegScavengerAssert.ll
…
2009-08-15-RegScavenger-EarlyClobber.ll
…
2009-08-15-RegScavengerAssert.ll
…
2009-08-21-PostRAKill2.ll
…
2009-08-21-PostRAKill3.ll
…
2009-08-21-PostRAKill.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-26-ScalarToVector.ll
…
2009-08-27-ScalarToVector.ll
…
2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
…
2009-08-31-LSDA-Name.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
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2009-10-27-double-align.ll
Re-land MachineInstr: Reason locally about some memory objects before going to AA.
2017-08-30 14:57:12 +00:00
2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
…
2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
…
2009-11-13-VRRewriterCrash.ll
…
2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-09-NeonSelect.ll
…
2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
…
2010-04-15-ScavengerDebugValue.ll
Remove the obsolete offset parameter from @llvm.dbg.value
2017-07-28 20:21:02 +00:00
2010-05-14-IllegalType.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2010-05-17-FastAllocCrash.ll
…
2010-05-18-LocalAllocCrash.ll
…
2010-05-18-PostIndexBug.ll
…
2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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2010-05-21-BuildVector.ll
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2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
…
2010-06-21-nondarwin-tc.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
2010-06-29-PartialRedefFastAlloc.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
2010-06-29-SubregImpDefs.ll
…
2010-07-26-GlobalMerge.ll
…
2010-08-04-EHCrash.ll
…
2010-08-04-StackVariable.ll
Remove the obsolete offset parameter from @llvm.dbg.value
2017-07-28 20:21:02 +00:00
2010-09-21-OptCmpBug.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll
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2010-12-07-PEIBug.ll
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2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2011-02-04-AntidepMultidef.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
2011-02-07-AntidepClobber.ll
…
2011-03-10-DAGCombineCrash.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2011-03-15-LdStMultipleBug.ll
…
2011-03-23-PeepholeBug.ll
…
2011-04-07-schediv.ll
…
2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
…
2011-04-15-AndVFlagPeepholeBug.ll
…
2011-04-15-RegisterCmpPeephole.ll
…
2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
…
2011-05-04-MultipleLandingPadSuccs.ll
…
2011-06-09-TailCallByVal.ll
…
2011-06-16-TailCallByVal.ll
…
2011-06-29-MergeGlobalsAlign.ll
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2011-07-10-GlobalMergeBug.ll
…
2011-08-02-MergedGlobalDbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2011-08-12-vmovqqqq-pseudo.ll
…
2011-08-25-ldmia_ret.ll
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2011-08-29-ldr_pre_imm.ll
…
2011-08-29-SchedCycle.ll
…
2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2011-09-28-CMovCombineBug.ll
…
2011-10-26-ExpandUnalignedLoadCrash.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2011-10-26-memset-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2011-10-26-memset-with-neon.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2011-11-07-PromoteVectorLoadStore.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2011-11-09-BitcastVectorDouble.ll
…
2011-11-09-IllegalVectorFPIntConvert.ll
…
2011-11-14-EarlyClobber.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
2011-11-28-DAGCombineBug.ll
…
2011-11-29-128bitArithmetics.ll
…
2011-11-30-MergeAlignment.ll
…
2011-12-14-machine-sink.ll
…
2011-12-19-sjlj-clobber.ll
…
2012-01-23-PostRA-LICM.ll
…
2012-01-24-RegSequenceLiveRange.ll
…
2012-01-26-CoalescerBug.ll
…
2012-01-26-CopyPropKills.ll
…
2012-02-01-CoalescerBug.ll
…
2012-03-05-FPSCR-bug.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-03-13-DAGCombineBug.ll
…
2012-03-26-FoldImmBug.ll
…
2012-04-02-TwoAddrInstrCrash.ll
…
2012-04-10-DAGCombine.ll
…
2012-04-24-SplitEHCriticalEdge.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
2012-05-04-vmov.ll
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2012-05-10-PreferVMOVtoVDUP32.ll
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2012-05-29-TailDupBug.ll
…
2012-06-12-SchedMemLatency.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
2012-08-04-DtripleSpillReload.ll
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2012-08-08-legalize-unaligned.ll
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2012-08-09-neon-extload.ll
…
2012-08-13-bfi.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-08-23-legalize-vmull.ll
…
2012-08-27-CopyPhysRegCrash.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
2012-08-30-select.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
2012-09-18-ARMv4ISelBug.ll
…
2012-09-25-InlineAsmScalarToVectorConv2.ll
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2012-09-25-InlineAsmScalarToVectorConv.ll
…
2012-10-04-AAPCS-byval-align8.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
2012-10-04-FixedFrame-vs-byval.ll
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2012-10-04-LDRB_POST_IMM-Crash.ll
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2012-10-18-PR14099-ByvalFrameAddress.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
2012-11-14-subs_carry.ll
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2013-01-21-PR14992.ll
…
2013-02-27-expand-vfma.ll
…
2013-04-05-Small-ByVal-Structs-PR15293.ll
…
2013-04-16-AAPCS-C4-vs-VFP.ll
…
2013-04-16-AAPCS-C5-vs-VFP.ll
…
2013-04-18-load-overlap-PR14824.ll
…
2013-04-21-AAPCS-VA-C.1.cp.ll
…
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
…
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
…
2013-05-05-IfConvertBug.ll
…
2013-05-07-ByteLoadSameAddress.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
2013-05-13-AAPCS-byval-padding2.ll
…
2013-05-13-AAPCS-byval-padding.ll
…
2013-05-13-DAGCombiner-undef-mask.ll
…
2013-05-31-char-shift-crash.ll
…
2013-06-03-ByVal-2Kbytes.ll
…
2013-07-29-vector-or-combine.ll
[ARM] preserve test intent by removing undef
2018-02-10 15:14:00 +00:00
2013-10-11-select-stalls.ll
…
2013-11-08-inline-asm-neon-array.ll
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2014-01-09-pseudo_expand_implicit_reg.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
2014-02-05-vfp-regs-after-stack.ll
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2014-02-21-byval-reg-split-alignment.ll
…
2014-05-14-DwarfEHCrash.ll
…
2014-07-18-earlyclobber-str-post.ll
…
2014-08-04-muls-it.ll
…
2015-01-21-thumbv4t-ldstr-opt.ll
…
2016-05-01-RegScavengerAssert.ll
…
2016-08-24-ARM-LDST-dbginfo-bug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
2018-02-13-PR36079.ll
[LegalizeDAG] Fix legalization of SETCC
2018-02-16 09:35:16 +00:00
a15-mla.ll
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a15-partial-update.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
a15-SD-dep.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
a15.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
aapcs-hfa-code.ll
[ARM] Enable DP copy, load and store instructions for FPv4-SP
2014-08-21 12:50:31 +00:00
aapcs-hfa.ll
…
acle-intrinsics-v5.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
acle-intrinsics.ll
[ARM] ACLE Chapter 9 intrinsics
2017-05-04 07:31:28 +00:00
addrmode.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
addrspacecast.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
addsubcarry-promotion.ll
[DAG] Promote ADDCARRY / SUBCARRY
2017-12-13 10:45:21 +00:00
adv-copy-opt.ll
…
aeabi-read-tp.ll
…
aggregate-padding.ll
ARM: treat [N x i32] and [N x i64] as AAPCS composite types
2015-02-24 17:22:34 +00:00
alias_store.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
aliases.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
align-sp-adjustment.ll
Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"
2017-05-16 17:59:07 +00:00
align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
alloc-no-stack-realign.ll
[DAGCombine] Disable finding better chains for stores at O0
2017-11-28 04:07:59 +00:00
alloca-align.ll
RegScavenging: Add scavengeRegisterBackwards()
2017-06-17 02:08:18 +00:00
alloca.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
and-cmpz.ll
…
and-load-combine.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
apcs-vfp.ll
…
arg-copy-elide.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
argaddr.ll
ARM: update even more tests
2014-04-03 17:35:22 +00:00
arguments2.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments3.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments4.ll
…
arguments5.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments6.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
arguments7.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments8.ll
Fix declarations in a few more tests.
2010-04-17 21:29:25 +00:00
arguments_f64_backfill.ll
…
arguments-nosplit-double.ll
NFC: I simply added CHECK-LABEL to prevent false matches in the tests.
2017-07-07 13:41:33 +00:00
arguments-nosplit-i64.ll
NFC: I simply added CHECK-LABEL to prevent false matches in the tests.
2017-07-07 13:41:33 +00:00
arguments.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
arm32-round-conv.ll
…
arm32-rounding.ll
…
arm-abi-attr.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
arm-and-tst-peephole.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
arm-asm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
arm-eabi.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
arm-frame-lowering-no-terminator.ll
…
arm-frameaddr.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
arm-insert-subvector.ll
[ARM] Check for assembler instructions in test.
2017-08-23 11:53:24 +00:00
arm-macho-tail.ll
ARM: use an external relocation for calls from MachO ARM mode.
2017-08-18 19:13:56 +00:00
arm-modifier.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
arm-negative-stride.ll
…
arm-position-independence-jump-table.ll
[ARM] Place jump table as the first operand in additions
2017-11-13 11:56:48 +00:00
arm-position-independence.ll
[ARM] Make RWPI use movw/movt when available
2017-02-07 13:07:12 +00:00
arm-returnaddr.ll
…
arm-shrink-wrapping-linux.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
arm-shrink-wrapping.ll
Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
2018-04-07 10:57:03 +00:00
arm-storebytesmerge.ll
[ARM][AArch64][DAG] Reenable post-legalize store merge
2017-12-06 15:30:13 +00:00
arm-ttype-target2.ll
…
ARMLoadStoreDBG.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
armv4.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
atomic-64bit.ll
ARM: Better codegen for 64-bit compares.
2016-03-21 18:00:02 +00:00
atomic-cmp.ll
[ARM] Emit clrex in the expanded cmpxchg fail block.
2015-09-22 17:22:58 +00:00
atomic-cmpxchg.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
atomic-load-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
atomic-op.ll
[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations
2018-02-28 17:13:07 +00:00
atomic-ops-v8.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
atomicrmw_minmax.ll
…
available_externally.ll
…
avoid-cpsr-rmw.ll
[SimplifyCFG] Avoid quadratic on a predecessors number behavior in instruction sinking.
2017-12-21 01:22:13 +00:00
bfc.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
bfi.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bfx.ll
[ARM] Add additional matching for UBFX instructions
2016-06-01 12:01:01 +00:00
bic.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
bicZext.ll
This change handles a another case for generating the bic instruction
2012-06-18 14:51:32 +00:00
big-endian-eh-unwind.ll
…
big-endian-neon-bitconv.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
big-endian-neon-extend.ll
…
big-endian-neon-trunc-store.ll
…
big-endian-ret-f64.ll
…
big-endian-vector-callee.ll
…
big-endian-vector-caller.ll
…
bit-reverse-to-rbit.ll
…
bits.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
bool-ext-inc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
bswap16.ll
…
bswap-inline-asm.ll
…
build-attributes-encoding.s
[ARM] Add DSP build attribute and extension targeting
2016-01-25 11:26:11 +00:00
build-attributes-fn-attr0.ll
…
build-attributes-fn-attr1.ll
…
build-attributes-fn-attr2.ll
…
build-attributes-fn-attr3.ll
…
build-attributes-fn-attr4.ll
…
build-attributes-fn-attr5.ll
…
build-attributes-fn-attr6.ll
…
build-attributes-optimization-minsize.ll
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
2015-12-07 14:22:39 +00:00
build-attributes-optimization-mixed.ll
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
2015-12-07 14:22:39 +00:00
build-attributes-optimization-optnone.ll
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
2015-12-07 14:22:39 +00:00
build-attributes-optimization-optsize.ll
…
build-attributes-optimization.ll
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
2015-12-07 14:22:39 +00:00
build-attributes.ll
[ARM] Add support for armv7e-m to the .arch directive
2017-11-29 10:12:15 +00:00
bx_fold.ll
…
byval_load_align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
byval-align.ll
…
cache-intrinsic.ll
…
call_nolink.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
call-noret-minsize.ll
…
call-noret.ll
…
call-tc.ll
…
call.ll
Don't print (PLT) on arm.
2016-06-16 16:09:53 +00:00
carry.ll
Address buildbot fallout from r259065
2016-01-28 18:59:04 +00:00
cdp2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
cdp.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
cfi-alignment.ll
ARM: add support for WatchOS's compact unwind information.
2015-10-28 22:56:36 +00:00
clang-section.ll
Add support for #pragma clang section
2017-06-05 10:09:13 +00:00
clz.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
cmn.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
cmp1-peephole-thumb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cmp2-peephole-thumb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
cmp.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
cmpxchg-idioms.ll
…
cmpxchg-O0-be.ll
ARM: fix big-endian 64-bit cmpxchg.
2017-06-30 19:51:02 +00:00
cmpxchg-O0.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
cmpxchg-weak.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
coalesce-dbgvalue.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
coalesce-subregs.ll
…
code-placement.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
coff-no-dead-strip.ll
test: fix ARM tests harder
2018-01-20 01:26:46 +00:00
combine-movc-sub.ll
…
combine-vmovdrr.ll
…
commute-movcc.ll
…
compare-call.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
constant-island-crash.ll
…
constant-islands-cfg.mir
Revert r325754 and r325755 (f16 literal pool) because buildbots were unhappy.
2018-02-22 08:41:55 +00:00
constant-islands.ll
…
constantfp.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
constantpool-align.ll
[SDAG] Use ABI type alignment for constant pools when optimizing for size
2016-10-17 12:54:07 +00:00
constantpool-promote-dbg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
constantpool-promote-duplicate.ll
ARM: track globals promoted to coalesced const pool entries
2017-09-07 04:00:13 +00:00
constantpool-promote-ldrh.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
constantpool-promote.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
constants.ll
AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
2015-12-08 02:37:48 +00:00
copy-cpsr.ll
…
copy-paired-reg.ll
…
cortex-a57-misched-alu.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-basic.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-ldm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-ldm.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-stm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-stm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vadd.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vfma.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortex-a57-misched-vldm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-vldm.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-vstm-wrback.ll
[CodeGen] Add dependency printer
2017-07-12 15:30:59 +00:00
cortex-a57-misched-vstm.ll
[ARM] Cortex-A57 scheduling model for ARM backend (AArch32)
2017-06-02 08:53:19 +00:00
cortex-a57-misched-vsub.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
cortexr52-misched-basic.ll
[ARM] Enable misched for R52.
2018-04-27 11:29:49 +00:00
crash-greedy-v6.ll
…
crash-greedy.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
crash-O0.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
crash-on-pow2-shufflevector.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
crash-shufflevector.ll
…
crash.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
crc32.ll
ARM: add test for crc32 instructions in CodeGen.
2015-01-14 01:43:33 +00:00
cse-call.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
cse-flags.ll
[SelectionDAG] CSE nodes with differing SDNodeFlags
2016-01-15 21:56:40 +00:00
cse-ldrlit.ll
…
cse-libcalls.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
ctor_order.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
ctors_dtors.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
cttz_vector.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cttz.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
cxx-tlscc.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
dag-combine-ldst.ll
Elide stores which are overwritten without being observed.
2017-05-16 19:43:56 +00:00
dagcombine-anyexttozeroext.ll
[DAGCombiner] Add a combine to turn a build vector of zero extends of extract vector elts into a vector zero extend and possibly an extract subvector.
2018-04-07 19:09:50 +00:00
dagcombine-concatvector.ll
…
darwin-eabi.ll
[ARM] Enable DP copy, load and store instructions for FPv4-SP
2014-08-21 12:50:31 +00:00
darwin-tls-preserved.ll
ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.
2017-04-19 18:07:54 +00:00
darwin-tls.ll
…
data-in-code-annotations.ll
ARM & AArch64: make use of common cmpxchg idioms after expansion
2014-05-30 10:09:59 +00:00
dbg-range-extension.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
dbg.ll
ARM: Add patterns for dbg
2014-08-26 12:47:26 +00:00
DbgValueOtherTargets.test
…
debug-frame-large-stack.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
debug-frame-no-debug.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
debug-frame-vararg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-frame.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-arg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-blocks.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
debug-info-branch-folding.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-d16-reg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-no-frame.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-qreg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-s16-reg.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-info-sreg2.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debug-segmented-stacks.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debugtrap.ll
[ARM] Emit trap instruction using .inst directive
2016-01-29 10:23:32 +00:00
default-float-abi.ll
Add support for musl-libc on ARM Linux.
2016-06-24 21:14:33 +00:00
default-reloc.ll
Fix default reloc model on ARM.
2016-05-28 10:41:15 +00:00
deprecated-asm.s
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
deps-fix.ll
Separate ExecutionDepsFix into 4 parts:
2018-01-22 10:05:23 +00:00
disable-fp-elim.ll
…
disable-tail-calls.ll
…
div.ll
[ARM] Add support for armv7ve triple in llvm (PR31358).
2017-02-09 23:29:14 +00:00
divmod-eabi.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
divmod-hwdiv.ll
[ARM] Check for correct HW div when lowering divmod
2017-04-18 08:32:27 +00:00
divmod.ll
ARM: use divmod libcalls on embedded MachO platforms too.
2017-05-08 20:00:14 +00:00
domain-conv-vmovs.ll
…
dsp-mlal.ll
[ARM] Add codegen for SMMULR, SMMLAR and SMMLSR
2018-01-12 09:24:41 +00:00
dwarf-eh.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
dwarf-unwind.ll
…
dyn-stackalloc.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
early-cfi-sections.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
eh-dispcont.ll
…
eh-resume-darwin.ll
…
ehabi-filters.ll
…
ehabi-handlerdata-nounwind.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-handlerdata.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
ehabi-no-landingpad.ll
…
ehabi-unwind.ll
…
ehabi.ll
[ARM] Use dwarf exception handling on MinGW
2017-11-17 08:04:40 +00:00
elf-lcomm-align.ll
…
emit-big-cst.ll
…
emutls1.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
emutls_generic.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
emutls.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
execute-only-big-stack-frame.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
execute-only-section.ll
Rewrite ARM execute only support to avoid the use of a command line flag and unqualified ARMSubtarget lookup.
2017-07-01 02:55:22 +00:00
execute-only.ll
[ARM] Place jump table as the first operand in additions
2017-11-13 11:56:48 +00:00
expand-pseudos.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
extload-knownzero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
extloadi1.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fabs-neon.ll
…
fabs-to-bfc.ll
…
fabss.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
fadds.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fast-isel-align.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-binary.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-br-const.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-br-phi.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-call-multi-reg-return.ll
…
fast-isel-call.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel-cmp-imm.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fast-isel-conversion.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-crash2.ll
…
fast-isel-crash.ll
…
fast-isel-deadcode.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
fast-isel-ext.ll
Limit the range of processors supported by ARM fast isel to v6 or
2015-09-18 20:08:18 +00:00
fast-isel-fold.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-frameaddr.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
fast-isel-GEP-coalesce.ll
…
fast-isel-icmp.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-indirectbr.ll
…
fast-isel-inline-asm.ll
[FastISel] Local values shouldn't be alive across an inline asm call with side effects.
2014-07-16 22:20:51 +00:00
fast-isel-intrinsic.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel-ldr-str-arm.ll
…
fast-isel-ldr-str-thumb-neg-index.ll
…
fast-isel-ldrh-strh-arm.ll
…
fast-isel-load-store-verify.ll
…
fast-isel-mvn.ll
…
fast-isel-pic.ll
Fix tests.
2015-10-26 20:49:49 +00:00
fast-isel-pie.ll
Use shouldAssumeDSOLocal.
2016-06-20 17:45:33 +00:00
fast-isel-pred.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-redefinition.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-remat-same-constant.ll
[Fast-ISel] Don't mark the first use of a remat constant as killed.
2015-05-09 00:51:03 +00:00
fast-isel-ret.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-select.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel-shift-materialize.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
fast-isel-shifter.ll
…
fast-isel-static.ll
[ARM] Define a subtarget feature and use it to decide whether long calls should
2015-07-07 06:54:42 +00:00
fast-isel-update-valuemap-for-extract.ll
…
fast-isel-vaddd.ll
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.
2015-05-06 16:39:17 +00:00
fast-isel-vararg.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
fast-isel.ll
Revert "Revert "Map DynamicNoPIC to Static on non-darwin.""
2016-05-28 04:47:13 +00:00
fast-tail-call.ll
…
fastcc-vfp.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-thumb-litpool.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
fcmp-xo.ll
[ARM] Support float literals under XO
2018-03-28 10:02:26 +00:00
fcopysign.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
fdivs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fence-singlethread.ll
Enhance synchscope representation
2017-07-11 22:23:00 +00:00
fixunsdfdi.ll
…
flag-crash.ll
…
float-helpers.s
[ARM] Add test to check pcs of ARM ABI runtime floating point helpers
2017-07-28 09:21:00 +00:00
floorf.ll
llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, or it fails on msvc.
2012-08-14 00:56:06 +00:00
fmacs.ll
[ARM] fixed some tabs/whitespaces in test. NFC.
2018-02-02 11:51:06 +00:00
fmdrr-fmrrd.ll
…
fmscs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fmuls.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fnattr-trap.ll
…
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll
[ARM] Add missing selection patterns for vnmla
2017-09-22 09:50:52 +00:00
fnmul.ll
…
fnmuls.ll
…
fold-const.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fold-sext-sextload.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
fold-stack-adjust.ll
Codegen: Make chains from trellis-shaped CFGs
2017-02-15 19:49:14 +00:00
fold-zext-zextload.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
formal.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp16-args.ll
Do not ASSERTZEXT for i16 result of bitcast from f16 operand
2016-01-08 17:46:05 +00:00
fp16-instructions.ll
[DAG] propagate FMF for all FPMathOperators
2018-05-15 14:16:24 +00:00
fp16-intrinsic-vector-1op.ll
[ARM] Support for v4f16 and v8f16 vectors
2018-03-19 13:35:25 +00:00
fp16-intrinsic-vector-2op.ll
[ARM] Support for v4f16 and v8f16 vectors
2018-03-19 13:35:25 +00:00
fp16-litpool2-arm.mir
[MIR] Add support for debug metadata for fixed stack objects
2018-04-25 18:58:06 +00:00
fp16-litpool3-arm.mir
[MIR] Add support for debug metadata for fixed stack objects
2018-04-25 18:58:06 +00:00
fp16-litpool-arm.mir
Recommit: [ARM] f16 constant pool fix
2018-02-22 10:43:57 +00:00
fp16-litpool-thumb.mir
Recommit: [ARM] f16 constant pool fix
2018-02-22 10:43:57 +00:00
fp16-promote.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
fp16-v3.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
fp16-vminmaxnm-safe.ll
[ARM] FP16 vmaxnm/vminnm scalar instructions
2018-04-13 15:34:26 +00:00
fp16-vminmaxnm.ll
[ARM] FP16 vmaxnm/vminnm scalar instructions
2018-04-13 15:34:26 +00:00
fp16.ll
Add support for musl-libc on ARM Linux.
2016-06-24 21:14:33 +00:00
fp_convert.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp-arg-shuffle.ll
…
fp-fast.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fp-only-sp.ll
ARM: make sure FastISel bails on f64 operations for Cortex-M4.
2017-02-23 22:35:00 +00:00
fp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fparith.ll
[ARM] Fix up buildbots after r246360
2015-08-29 11:50:08 +00:00
fpcmp_ueq.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpcmp-f64-neon-opt.ll
…
fpcmp-opt.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
fpcmp.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
fpconsts.ll
…
fpconv.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fpmem.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fpoffset_overflow.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fpow.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
fpowi.ll
…
fpscr-intrinsics.ll
[ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each other""
2017-03-07 11:17:53 +00:00
fptoint.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fpvcvtr.ll
[ARM] Add LLVM tests for the vcvtr builtins
2018-02-17 19:59:29 +00:00
frame-register.ll
…
fsubs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ftrunc.ll
[DAGCombine] (float)((int) f) --> ftrunc (PR36617)
2018-04-20 15:07:55 +00:00
func-argpassing-endian.ll
…
fusedMAC.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
gep-optimization.ll
[DAGCombiner] Fold together mul and shl when both are by a constant
2015-08-21 10:48:17 +00:00
ghc-tcreturn-lowered.ll
…
global-merge-1.ll
…
global-merge-addrspace.ll
…
global-merge-dllexport.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
global-merge-external.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
global-merge.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
globals.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
gpr-paired-spill-thumbinst.ll
…
gpr-paired-spill.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
gv-stubs-crash.ll
…
half.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
hardfloat_neon.ll
Eliminate more uses of llvm-as and llvm-dis.
2009-09-09 00:09:15 +00:00
hello.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
hfa-in-contiguous-registers.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
hints.ll
…
i1.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
iabs.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ifconv-kills.ll
…
ifconv-regmask.ll
…
ifcvt1.ll
…
ifcvt2.ll
…
ifcvt3.ll
…
ifcvt4.ll
…
ifcvt5.ll
…
ifcvt6.ll
…
ifcvt7.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
ifcvt11.ll
…
ifcvt12.ll
…
ifcvt_canFallThroughTo.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_diamond_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_forked_diamond_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_simple_bad_zero_prob_succ.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_simple_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt_triangleWoCvtToNextEdge.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
ifcvt-branch-weight-bug.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
ifcvt-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
ifcvt-callback.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
ifcvt-dead-def.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
ifcvt-iter-indbr.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
ifcvt-regmask-noreturn.ll
…
illegal-bitfield-loadstore.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
illegal-vector-bitcast.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
imm-peephole-arm.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imm-peephole-thumb.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
imm.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
immcost.ll
…
indirect-hidden.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
indirect-reg-input.ll
…
indirectbr-2.ll
…
indirectbr-3.ll
[IfConversion] Maintain the CFG when predicating/merging blocks in IfConvert*
2017-08-11 06:57:08 +00:00
indirectbr.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
inline-diagnostics.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inlineasm2.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm3.ll
[ARM] Skip inline asm memory operands in DAGToDAGISel
2016-07-20 09:48:24 +00:00
inlineasm4.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm-64bit.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
inlineasm-error-t-toofewregs.ll
[ARM] Fix redirect in inline assembly test
2018-02-15 19:17:55 +00:00
inlineasm-global.ll
llvm/test/CodeGen/ARM/inlineasm-global.ll: Add explicit triple to appease targeting *-win32.
2014-07-25 09:55:01 +00:00
inlineasm-imm-arm.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
inlineasm-imm-thumb2.ll
Add some testing for thumb1 and thumb2 inline asm immediate constraints
2016-01-08 00:34:44 +00:00
inlineasm-imm-thumb.ll
Add some testing for thumb1 and thumb2 inline asm immediate constraints
2016-01-08 00:34:44 +00:00
inlineasm-ldr-pseudo.ll
[ARM] Fixup tests to take into account mov translation. NFC.
2016-05-12 21:22:37 +00:00
inlineasm-switch-mode-oneway-from-arm.ll
…
inlineasm-switch-mode-oneway-from-thumb.ll
…
inlineasm-switch-mode.ll
Revert r265817
2016-04-08 18:15:37 +00:00
inlineasm-X-allocation.ll
[ARM] Add support for the X asm constraint
2016-04-25 14:29:18 +00:00
inlineasm-X-constraint.ll
Pass the test file in through stdin instead of by filename.
2016-04-26 03:43:49 +00:00
inlineasm.ll
[ARM] Allow 64- and 128-bit types with 't' inline asm constraint
2018-02-15 14:44:22 +00:00
insn-sched1.ll
…
int-to-fp.ll
…
integer_insertelement.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
interrupt-attr.ll
ARM: use r7 as the frame-pointer on all MachO targets.
2016-04-11 22:27:40 +00:00
interval-update-remat.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
interwork.ll
[ARM] Add ".code 32" to functions in the ARM instruction set
2016-09-13 12:18:15 +00:00
intrinsics-coprocessor.ll
…
intrinsics-crypto.ll
…
intrinsics-memory-barrier.ll
…
intrinsics-overflow.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
intrinsics-v8.ll
…
invalid-target.ll
Fix ARM triple parsing
2014-11-17 14:08:57 +00:00
invalidated-save-point.ll
[Improve CodeGen Testing] This patch renables MIRPrinter print fields which have value equal to its default.
2017-06-06 08:16:19 +00:00
invoke-donothing-assert.ll
…
isel-v8i32-crash.ll
…
ispositive.ll
…
jump-table-islands-split.ll
…
jump-table-islands.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
jump-table-tbh.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
jumptable-label.ll
…
krait-cpu-div-attribute.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
large-stack.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
large-vector.ll
ARM: don't try to over-align large vectors as arguments.
2018-05-03 12:54:25 +00:00
ldaex-stlex.ll
…
ldc2l.ll
[ARM] Add backend support for load/store intrinsics.
2016-05-31 12:39:30 +00:00
ldm-base-writeback.ll
[ARM] Transform LDMs into writeback form to save code size
2016-06-07 11:47:24 +00:00
ldm-stm-base-materialization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
ldm-stm-i256.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
ldm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
ldr_ext.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldr_frame.ll
Fix some erroneous lit test failures due to unlucky name of working directory.
2016-02-17 16:35:18 +00:00
ldr_post.ll
…
ldr_pre.ll
…
ldr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
ldrd-memoper.ll
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
ldrd.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
ldst-f32-2-i32.ll
…
ldstrex-m.ll
…
ldstrex.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
legalize-unaligned-load.ll
Delete Default and JITDefault code models
2017-08-03 02:16:21 +00:00
lit.local.cfg
…
litpool-licm.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
load_i1_select.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
load_store_multiple.ll
[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.
2017-12-14 18:06:25 +00:00
load_store_opt_kill.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
load-address-masked.ll
…
load-arm.ll
ARM: add extra test for addrmode folding.
2017-05-03 16:54:30 +00:00
load-combine-big-endian.ll
Fix a reoccuring typo in load-combine tests
2018-03-27 17:33:50 +00:00
load-combine.ll
Fix a reoccuring typo in load-combine tests
2018-03-27 17:33:50 +00:00
load-global2.ll
[arm] Fix Unnecessary reloads from GOT.
2017-11-13 20:45:38 +00:00
load-global.ll
ARM/ELF: Better codegen for global variable addresses.
2015-10-26 18:23:16 +00:00
load-store-flags.ll
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
2015-10-05 14:49:54 +00:00
load.ll
[ARM] Reorganise and simplify thumb-1 load/store selection
2015-08-13 10:48:22 +00:00
local-call.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
log2_not_readnone.ll
…
long_shift.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
long-setcc.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
long.ll
…
longMAC.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
loopvectorize_pr33804.ll
[LoopVectorizer] Add more testcases for PR33804.
2017-09-18 17:28:15 +00:00
lowerMUL-newload.ll
[SelectionDAG] [ARM CodeGen] Fix chain information of LowerMUL
2017-04-06 20:22:51 +00:00
lsr-code-insertion.ll
ARM: override cost function to re-enable ConstantHoisting (& fix it).
2016-04-13 23:08:27 +00:00
lsr-icmp-imm.ll
…
lsr-scale-addr-mode.ll
…
lsr-unfolded-offset.ll
…
machine-copyprop.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
machine-cse-cmp.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
machine-licm.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
macho-extern-hidden.ll
…
macho-frame-offset.ll
ARM: use callee-saved list in the order they're actually saved.
2016-05-13 19:16:14 +00:00
MachO-subtypes.ll
…
macho-trap.ll
MachO: trap unreachable instructions
2018-04-13 22:25:20 +00:00
mature-mc-support.ll
[LLC] Add an inline assembly diagnostics handler.
2017-02-03 11:14:39 +00:00
mem.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
memcpy-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-ldm-stm.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memcpy-no-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memfunc.ll
Place undefined globals in .bss instead of .data
2018-02-06 23:22:14 +00:00
memset-inline.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
MergeConsecutiveStores.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
metadata-default.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
metadata-short-enums.ll
…
metadata-short-wchar.ll
…
minmax.ll
[ARM] Add instruction selection patterns for vmin/vmax
2015-08-19 14:11:27 +00:00
minsize-call-cse.ll
…
minsize-imms.ll
ARM: use litpools for normal i32 imms when compiling minsize.
2014-01-23 13:43:47 +00:00
minsize-litpools.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
misched-copy-arm.ll
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
2017-12-07 10:40:31 +00:00
misched-fp-basic.ll
CodeGen: Rename DEBUG_TYPE to match passnames
2017-05-25 21:26:32 +00:00
misched-fusion-aes.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
misched-int-basic-thumb2.mir
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
misched-int-basic.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
mls.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
movcc-double.ll
…
movt-movw-global.ll
…
movt.ll
[ARM] Enable Cortex-M23 and Cortex-M33 support.
2017-02-01 11:55:03 +00:00
msr-it-block.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
mul_const.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
mul.ll
ARM: update even more tests
2014-04-03 17:35:22 +00:00
mulhi.ll
…
mult-alt-generic-arm.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
mvn.ll
…
named-reg-alloc.ll
Re-commit of r238201 with fix for building with shared libraries.
2015-06-01 12:02:47 +00:00
named-reg-notareg.ll
…
negate-i1.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
negative-offset.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
neon_arith1.ll
…
neon_cmp.ll
…
neon_div.ll
…
neon_fpconv.ll
…
neon_ld1.ll
…
neon_ld2.ll
…
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
…
neon_vabs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
neon_vshl_minint.ll
…
neon-dot-product.ll
[ARM] Codegen for v8.2A dot product intrinsics
2018-04-27 12:50:40 +00:00
neon-fma.ll
…
neon-spfp.ll
…
neon-v8.1a.ll
…
nest-register.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
no_redundant_trunc_for_cmp.ll
…
no-arm-mode.ll
[ARM] Emit error when ARM exec mode is not available.
2017-08-09 15:39:10 +00:00
no-cfi.ll
Canonicalize the representation of empty an expression in DIGlobalVariableExpression
2017-08-30 18:06:51 +00:00
no-cmov2bfi.ll
[ARM] Fix computeKnownBits for ARMISD::CMOV
2017-03-23 16:47:47 +00:00
no-fpscr-liveness.ll
LiveIntervalAnalysis: Fix alias regunit reserved definition
2017-09-01 18:36:26 +00:00
no-fpu.ll
…
no-tail-call.ll
…
none-macho-v4t.ll
…
none-macho.ll
…
noopt-dmb-v7.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
nop_concat_vectors.ll
…
noreturn-csr-skip.mir
Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
2018-04-07 10:57:03 +00:00
noreturn.ll
…
null-streamer.ll
llvm-mc: Use Target::createNullStreamer to fix crashes on target-specific asm directives.
2015-02-19 00:45:04 +00:00
opt-shuff-tstore.ll
…
optimize-dmbs-v7.ll
…
optselect-regclass.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
out-of-registers.ll
…
overflow-intrinsic-optimizations.ll
[ARM] Fix perf regression in compare optimization.
2018-01-19 17:46:27 +00:00
pack.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
peephole-bitcast.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
peephole-phi.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
pei-swiftself.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
phi.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
pic.ll
Don't print (PLT) on arm.
2016-06-16 16:09:53 +00:00
pie.ll
Add a use of shouldAssumeDSOLocal to ARM.
2016-05-31 15:31:55 +00:00
plt-relative-reloc.ll
…
popcnt.ll
…
pr3502.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
pr13249.ll
…
pr18364-movw.ll
…
pr25317.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
pr25838.ll
[LivePhysRegs] Fix handling of return instructions.
2018-02-06 23:00:17 +00:00
pr26669.ll
…
pr32545.ll
[SDAG] Fix visitAND optimization to deal with vector extract case again.
2017-04-06 19:05:41 +00:00
pr32578.ll
ARM: Fix PR32578
2017-11-28 01:17:52 +00:00
pr34045-2.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr34045.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr35103.ll
[ARM] Use ADDCARRY / SUBCARRY
2017-12-11 12:13:45 +00:00
pr36577.ll
[ARM] Fix for PR36577
2018-03-07 09:10:44 +00:00
PR15053.ll
…
PR32721_ifcvt_triangle_unanalyzable.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
PR35379.ll
[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
2018-01-08 14:47:19 +00:00
preferred-align.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
prefetch.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
prera-ldst-aliasing.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
prera-ldst-insertpt.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
print-memb-operand.ll
…
private.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
rbit.ll
[SelectionDAG] Add support for BITREVERSE constant folding
2017-01-16 13:39:00 +00:00
readcyclecounter.ll
ARM: implement @llvm.readcyclecounter intrinsic
2013-05-23 19:11:20 +00:00
readtp.ll
Add newline to end of test file. NFC.
2017-09-14 14:48:59 +00:00
reg_sequence.ll
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
2015-09-30 10:56:37 +00:00
regpair_hint_phys.ll
…
rem_crash.ll
…
ret0.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_f64_arg_stack.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_sret_vector.ll
…
ret_void.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
returned-ext.ll
…
returned-trunc-tail-calls.ll
…
rev.ll
The automatic CHECK: to CHECK-LABEL: conversion, back in 2013,
2017-02-25 15:17:16 +00:00
ror.ll
[DAGCombiner] visitRotate patch to optimize pair of ROTR/ROTL instructions into one with combined shift operand.
2017-07-05 17:55:42 +00:00
rotate.ll
[ARM] Expand ROTL and ROTR of vector value types
2015-10-27 10:25:20 +00:00
sat-to-bitop.ll
[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations
2018-02-28 17:13:07 +00:00
saxpy10-a9.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
sbfx.ll
ARM: spot SBFX-compatbile code expressed with sign_extend_inreg
2014-07-23 13:59:12 +00:00
scavenging.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
sched-it-debug-nodes.mir
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
section-name.ll
Bring r226038 back.
2015-01-19 15:16:06 +00:00
section.ll
FileCheck-ize and simplify RUN lines.
2011-07-02 20:43:11 +00:00
segmented-stacks-dynamic.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
segmented-stacks.ll
Fix ARMv4 support
2017-08-28 20:20:47 +00:00
select_const.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
select_xform.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
select-imm.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
select-undef.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
select.ll
Revert "[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations"
2018-01-31 22:55:19 +00:00
setcc-logic.ll
[ARM] Materialise some boolean values to avoid a branch
2018-02-16 09:23:59 +00:00
setcc-type-mismatch.ll
…
setjmp_longjmp.ll
[ARM] Restore the right frame pointer register in Int_eh_sjlj_longjmp
2017-09-28 19:04:30 +00:00
shift-combine.ll
[DAGCombine] Improve ReduceLoad for SRL
2018-04-09 08:16:11 +00:00
shift-i64.ll
[ARM] Expand long shifts for Thumb1 to __aeabi_ calls
2018-01-24 18:00:57 +00:00
shifter_operand.ll
…
shuffle.ll
Testcase for r127630.
2011-03-15 01:49:08 +00:00
sincos.ll
[SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just -fno-math-errno
2017-06-12 17:15:41 +00:00
single-issue-r52.mir
[CodeGen] Use MIR syntax for MachineMemOperand printing
2018-03-14 21:52:13 +00:00
sjlj-prepare-critical-edge.ll
…
sjljeh-swifterror.ll
SjLjEHPrepare: Don't reg-to-mem swifterror values
2018-03-14 15:44:07 +00:00
sjljehprepare-lower-empty-struct.ll
[ARM] Fix SJLJ exception handling when manually chosen on a platform where it isn't default
2017-09-28 19:04:14 +00:00
smml.ll
[ARM] Fix erroneous availability of SMMLS for Armv7-M
2018-01-12 09:21:09 +00:00
smul.ll
[ARM] Move SMULW[B|T] isel to DAG Combine
2017-03-14 09:13:22 +00:00
softfp-fabs-fneg.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
space-directive.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
special-reg-acore.ll
…
special-reg-mcore.ll
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
2017-02-10 17:41:08 +00:00
special-reg-v8m-base.ll
…
special-reg-v8m-main.ll
[ARM] Unify handling of M-Class system registers
2017-07-19 12:57:16 +00:00
special-reg.ll
…
spill-q.ll
…
splitkit.ll
SplitKit: Fix liveness recomputation in some remat cases.
2018-02-02 00:08:19 +00:00
ssat-lower.ll
…
ssat-upper.ll
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
2015-12-20 06:41:44 +00:00
ssat-v4t.ll
…
ssat.ll
…
ssp-data-layout.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-alignment.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
stack-frame.ll
Fix test/CodeGen/arm.ll
2014-04-23 01:09:29 +00:00
stack-protector-bmovpcb_call.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stack-size-section.ll
Use local symbols for creating .stack-size.
2018-03-26 20:40:22 +00:00
stackpointer.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
static-addr-hoisting.ll
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
2017-03-14 00:34:14 +00:00
stc2.ll
[ARM] Add backend support for load/store intrinsics.
2016-05-31 12:39:30 +00:00
stm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
str_post.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
str_pre-2.ll
Unified logic for computing target ABI in backend and front end by moving this common code to Support/TargetParser.
2017-06-30 00:03:54 +00:00
str_pre.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
str_trunc.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
struct_byval_arm_t1_t2.ll
[ARM] Return true in enableMultipleCopyHints().
2018-02-16 09:51:01 +00:00
struct_byval.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
struct-byval-frame-index.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
sub-cmp-peephole.ll
[ARM] Call setBooleanContents(ZeroOrOneBooleanContent)
2017-08-22 11:02:37 +00:00
sub.ll
ARM big endian function argument passing
2014-05-08 14:06:24 +00:00
subreg-remat.ll
[CodeGen] Don't print "pred:" and "opt:" in -debug output
2018-01-09 17:31:07 +00:00
subtarget-features-long-calls.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
subtarget-no-movt.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
swift-atomics.ll
…
swift-ios.ll
…
swift-return.ll
…
swift-vldm.ll
…
swifterror.ll
[FastISel] Disable local value sinking by default
2018-04-11 16:03:07 +00:00
swiftself.ll
[ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'
2017-02-08 22:30:47 +00:00
switch-minsize.ll
[SDAGBuilder] Don't create a binary tree for switches in minsize mode
2016-09-08 13:12:22 +00:00
sxt_rot.ll
[ARM] Improve sxta{b|h} and uxta{b|h} tests
2016-08-10 09:34:34 +00:00
t2-imm.ll
…
t2-shrink-ldrpost.ll
…
t2abs-killflags.ll
Don't always apply kill flag in thumb2 ABS pseudo expansion.
2015-04-30 22:15:59 +00:00
tail-call-builtin.ll
…
tail-call-float.ll
…
tail-call-weak.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
tail-call.ll
[ARM] Relax restriction on variadic functions for tailcall optimization
2016-11-17 10:56:58 +00:00
tail-dup-bundle.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
tail-dup-kill-flags.ll
…
tail-dup.ll
…
tail-merge-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
tail-opts.ll
[BranchFolding] Tail common all identical unreachable blocks
2017-02-14 21:02:24 +00:00
tailcall-mem-intrinsics.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
taildup-branch-weight.ll
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
2018-02-09 00:10:31 +00:00
test-sharedidx.ll
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
2015-09-18 18:19:40 +00:00
this-return.ll
…
thread_pointer.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
thumb1_return_sequence.ll
[ARM] Fix an off-by-one error when restoring LR for 16-bit Thumb
2017-11-27 10:13:14 +00:00
thumb1-div.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
thumb1-ldst-opt.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
thumb1-varalloc.ll
ARM: stop emitting blx instructions for most calls on MachO.
2016-05-10 19:17:47 +00:00
thumb2-it-block.ll
[NFC] Use stdin for some tests instead of positional argument.
2017-06-29 14:51:54 +00:00
thumb2-size-opt.ll
…
thumb2-size-reduction-internal-flags.ll
…
thumb_indirect_calls.ll
…
thumb-alignment.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
thumb-big-stack.ll
…
thumb-litpool.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
thumb-stub.ll
…
tls1.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
tls2.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
tls3.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
tls-models.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
trap-unreachable.ll
[CodeGen] Add a -trap-unreachable option for debugging
2018-02-12 11:06:27 +00:00
trap.ll
[ARM] Emit trap instruction using .inst directive
2016-01-29 10:23:32 +00:00
trunc_ldr.ll
…
truncstore-dag-combine.ll
…
tst_teq.ll
…
twoaddrinstr.ll
ExpandPostRAPseudos should transfer implicit uses, not only implicit defs
2016-07-15 22:31:14 +00:00
uint64tof64.ll
…
umulo-32.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
unaligned_load_store_vector.ll
…
unaligned_load_store_vfp.ll
…
unaligned_load_store.ll
[ARM] Define subtarget feature strict-align.
2015-07-28 22:44:28 +00:00
undef-sext.ll
…
undefined.ll
ARM: introduce llvm.arm.undefined intrinsic
2014-05-22 04:46:46 +00:00
unfold-shifts.ll
[ARM] and, or, xor and add with shl combine
2017-11-02 10:43:10 +00:00
unord.ll
…
unsafe-fsub.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
unschedule-first-call.ll
[ScheduleDAG] Don't schedule node with physical register interference
2017-08-01 00:28:40 +00:00
unwind-init.ll
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
2013-07-14 06:24:09 +00:00
urem-opt-size.ll
…
usat-lower.ll
…
usat-upper.ll
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
2015-12-20 06:41:44 +00:00
usat-v4t.ll
…
usat.ll
[ARM] Lower unsigned saturation to USAT
2017-12-20 11:13:57 +00:00
uxt_rot.ll
…
uxtb.ll
test: modernise ARM CodeGen tests
2016-12-27 18:35:19 +00:00
v1-constant-fold.ll
…
v6-jumptable-clobber.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
v6m-smul-with-overflow.ll
Fix signed multiplication with overflow fallback.
2017-04-26 13:41:43 +00:00
v6m-umul-with-overflow.ll
DAG: correctly legalize UMULO.
2017-06-20 15:01:38 +00:00
v7k-abi-align.ll
…
v7k-libcalls.ll
…
v7k-sincos.ll
…
v8m-tail-call.ll
[ARM] Accept a subset of Thumb GPR register class when emitting an SP-relative
2018-01-26 10:20:58 +00:00
v8m.base-jumptable_alignment.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
va_arg.ll
[ARM] Prefer BIC over BFC in ARM mode.
2017-04-07 22:01:23 +00:00
vaba.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vabd.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vabs.ll
[ARM][NEON] Add support for ISD::ABS lowering
2017-05-08 10:37:34 +00:00
vadd.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vararg_no_start.ll
…
varargs-spill-stack-align-nacl.ll
…
vargs_align.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vargs.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
vbits.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vbsl-constant.ll
…
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vcmp-crash.ll
[ARM] Fix crash caused by r294945
2017-02-13 17:18:00 +00:00
vcnt.ll
[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.
2016-04-26 05:04:37 +00:00
vcombine.ll
[DAGCombiner] use narrow load to avoid vector extract
2017-05-27 14:07:03 +00:00
vcvt_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vcvt-cost.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vcvt-v8.ll
…
vcvt.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vdiv_combine.ll
[CodeGen] Always use printReg to print registers in both MIR and debug
2017-11-30 16:12:24 +00:00
vdup.ll
…
vector-DAGCombine.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vector-extend-narrow.ll
[ARM] Enable vector extload combine for legal types.
2015-03-05 19:37:53 +00:00
vector-load.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
vector-promotion.ll
Don't conditionalize Neon instructions, even in IT blocks.
2017-06-22 12:11:38 +00:00
vector-spilling.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vector-store.ll
ARM: handle post-indexed NEON ops where the offset isn't the access width.
2017-04-20 19:54:02 +00:00
vext.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vfcmp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vfloatintrinsics.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vfp-libcalls.ll
…
vfp-reg-stride.ll
…
vfp-regs-dwarf.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
vfp.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vget_lane.ll
…
vhadd.ll
…
vhsub.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vicmp-64.ll
…
vicmp.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
virtregrewriter-subregliveness.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vld1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld2.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vld3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vld-vst-upgrade.ll
…
vlddup.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vldlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vldm-liveness.ll
[ARM] Check correct instructions for load/store rescheduling.
2017-03-01 22:56:20 +00:00
vldm-liveness.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vldm-sched-a9.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vminmax.ll
[CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN
2016-04-14 07:13:24 +00:00
vminmaxnm-safe.ll
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vminmaxnm.ll
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vmla.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vmls.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vmov.ll
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
2015-09-30 10:56:37 +00:00
vmul.ll
[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.
2016-12-16 18:44:08 +00:00
vneg.ll
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vpadal.ll
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vpadd.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vpminmax.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vrev.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vrint.ll
[NEON] Support intrinsic for scalar and vector versions of the VRINTN instruction
2018-04-13 12:45:12 +00:00
vsel.ll
[ARM] Use VCMP, not VCMPE, for floating point equality comparisons
2017-02-13 12:32:47 +00:00
vselect_imax.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00
vshift.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vshiftins.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vshl.ll
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vshll.ll
[SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors
2017-09-25 19:26:08 +00:00
vshrn.ll
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vsra.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vst1.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vst2.ll
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
2015-09-30 10:56:37 +00:00
vst3.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vst4.ll
[ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB
2018-03-02 13:02:55 +00:00
vstlane.ll
[ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8).
2017-06-28 07:07:03 +00:00
vsub.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vtbl.ll
[ARM] Use TableGen patterns to select vtbl. NFC.
2017-04-19 20:39:39 +00:00
vtrn.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vuzp.ll
ARM: don't try to over-align large vectors as arguments.
2018-05-03 12:54:25 +00:00
vzip.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
warn-stack.ll
[ARM] Generate consistent frame records for Thumb2
2016-08-23 09:19:22 +00:00
weak2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
weak.ll
ARM: fixup more tests to specify the target more explicitly
2014-04-03 16:01:44 +00:00
wide-compares.ll
[ARM] Avoid creating duplicate ANDs in SelectionDAG
2017-08-22 11:02:45 +00:00
widen-vmovs.ll
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wrong-t2stmia-size-opt.ll
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xray-armv6-attribute-instrumentation.ll
[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text
2017-09-04 05:34:58 +00:00
xray-armv7-attribute-instrumentation.ll
[XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text
2017-09-04 05:34:58 +00:00
xray-tail-call-sled.ll
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zero-cycle-zero.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
zext-logic-shift-load.ll
[DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))
2018-04-07 23:36:10 +00:00
zextload_demandedbits.ll
ARM: Do not use llc -march in tests.
2017-08-01 22:20:49 +00:00