Craig Topper 8f04d81ede [SelectionDAG][RISCV] Mask constants to narrow size in TargetLowering::expandUnalignedStore. ...

If the SRL for Hi constant folds, but we don't remoe those bits from
the Lo, we can end up with strange constant folding through DAGCombine later.
I've only seen this with constants being lowered to constant pools
during lowering on RISC-V.

2023-09-18 09:10:19 -07:00

..

CMakeLists.txt

…

DAGCombiner.cpp

[SDag] Fold saddo[_carry] with bitwise-not argument to ssubo[_carry] (#66571)

2023-09-18 14:45:41 +03:00

FastISel.cpp

[XRay][AArch64] Suppport __xray_customevent/__xray_typedevent

2023-06-23 09:24:18 -07:00

FunctionLoweringInfo.cpp

…

InstrEmitter.cpp

[InlineAsm] refactor InlineAsm class NFC (#65649)

2023-09-11 09:27:37 -07:00

InstrEmitter.h

…

LegalizeDAG.cpp

[SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs

2023-09-16 17:09:41 +08:00

LegalizeFloatTypes.cpp

IR: Add llvm.exp10 intrinsic

2023-09-01 19:45:03 -04:00

LegalizeIntegerTypes.cpp

[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD::PREFETCH. (#66601)

2023-09-18 08:58:50 -07:00

LegalizeTypes.cpp

[DAG] Use legal shift amount type in DAGTypeLegalizer::JoinIntegers

2023-07-12 08:12:09 +01:00

LegalizeTypes.h

[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD::PREFETCH. (#66601)

2023-09-18 08:58:50 -07:00

LegalizeTypesGeneric.cpp

[LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure

2023-05-24 10:17:08 +08:00

LegalizeVectorOps.cpp

IR: Add llvm.exp10 intrinsic

2023-09-01 19:45:03 -04:00

LegalizeVectorTypes.cpp

IR: Add llvm.exp10 intrinsic

2023-09-01 19:45:03 -04:00

ResourcePriorityQueue.cpp

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ScheduleDAGFast.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

ScheduleDAGRRList.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

ScheduleDAGSDNodes.cpp

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ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SDNodeDbgValue.h

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SelectionDAG.cpp

[DAG] getNode() - begin generalizing the (zext (trunc (assertzext x))) -> (assertzext x) fold.

2023-09-18 15:32:31 +01:00

SelectionDAGAddressAnalysis.cpp

[X86] Fix aliasing check between TargetFrameIndex and FrameIndex

2023-08-17 10:48:08 +01:00

SelectionDAGBuilder.cpp

[SelectionDAG][RISCV][PowerPC][X86] Use TargetConstant for immediates for ISD::PREFETCH. (#66601)

2023-09-18 08:58:50 -07:00

SelectionDAGBuilder.h

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SelectionDAGDumper.cpp

IR: Add llvm.exp10 intrinsic

2023-09-01 19:45:03 -04:00

SelectionDAGISel.cpp

[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)

2023-09-14 14:10:14 -07:00

SelectionDAGPrinter.cpp

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SelectionDAGTargetInfo.cpp

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StatepointLowering.cpp

[llvm] Fix duplicate word typos. NFC

2023-09-01 18:25:16 -07:00

StatepointLowering.h

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TargetLowering.cpp

[SelectionDAG][RISCV] Mask constants to narrow size in TargetLowering::expandUnalignedStore.

2023-09-18 09:10:19 -07:00