310473c536
This patch is essentially an adaption of LLD's algorithm to JITLink. Currently, only relaxing R_RISCV_CALL(_PLT) and R_RISCV_ALIGN is implemented, other relocations can follow later. From a high level, the algorithm works as follows. In the first phase (relaxBlock), we iteratively try to relax all instructions that have a R_RISCV_RELAX relocation: - If, based on the current symbol values, an instruction sequence can be relaxed (i.e., replaced by a shorter instruction), we record how many bytes would be removed, the new instruction (Writes), and the new relocation type (EdgeKinds). - We keep track of the total number of bytes that got removed up to each relocation in the RelocDeltas array. This is the cumulative sum of the number of bytes removed for each relocation. - Symbol values and sizes are updated based on the number of removed bytes. - If for any relocation, the current RelocDeltas value doesn't match the one from the previous iteration, something changed and we need to run another iteration as some symbols might now have different values. In the second phase (finalizeBlockRelax), all code is moved based on RelocDeltas, the relaxed instructions are rewritten using Writes, and R_RISCV_ALIGN is handled (moving instructions to ensure alignment and inserting the correct NOP-sequence if needed). Finally, edge kinds and offsets are updated and all R_RISCV_RELAX and R_RISCV_ALIGN edges are removed (they are not needed anymore for the fixup linking stage). Linker relaxation is implemented as a pass and added to PreFixupPasses in the default configuration on RISC-V. Since linker relaxation removes instructions, the memory for blocks should ideally be reallocated. However, I believe this is currently not possible in JITLink. Therefore, relaxation directly modifies the memory of blocks, reducing the number of instructions but not the size of blocks. I'm not very familiar with JITLink's memory allocators so I might be overlooking something here, though. Note on testing: some of the tests rely on the debug output of llvm-jitlink. The main reason for this is the verification of symbol sizes (which may change due to relaxation). I don't believe this can be done using jitlink-check checks alone. Note that there is a slightly unrelated change that makes Symbol::setOffset public to be able to update symbol offsets during relaxation. Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D149526
91 lines
2.4 KiB
C++
91 lines
2.4 KiB
C++
//===------ riscv.cpp - Generic JITLink riscv edge kinds, utilities -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Generic utilities for graphs representing riscv objects.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ExecutionEngine/JITLink/riscv.h"
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#define DEBUG_TYPE "jitlink"
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namespace llvm {
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namespace jitlink {
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namespace riscv {
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const char *getEdgeKindName(Edge::Kind K) {
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switch (K) {
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case R_RISCV_32:
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return "R_RISCV_32";
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case R_RISCV_64:
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return "R_RISCV_64";
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case R_RISCV_BRANCH:
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return "R_RISCV_BRANCH";
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case R_RISCV_JAL:
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return "R_RISCV_JAL";
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case R_RISCV_CALL:
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return "R_RISCV_CALL";
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case R_RISCV_CALL_PLT:
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return "R_RISCV_CALL_PLT";
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case R_RISCV_GOT_HI20:
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return "R_RISCV_GOT_HI20";
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case R_RISCV_PCREL_HI20:
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return "R_RISCV_PCREL_HI20";
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case R_RISCV_PCREL_LO12_I:
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return "R_RISCV_PCREL_LO12_I";
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case R_RISCV_PCREL_LO12_S:
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return "R_RISCV_PCREL_LO12_S";
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case R_RISCV_HI20:
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return "R_RISCV_HI20";
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case R_RISCV_LO12_I:
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return "R_RISCV_LO12_I";
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case R_RISCV_LO12_S:
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return "R_RISCV_LO12_S";
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case R_RISCV_ADD8:
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return "R_RISCV_ADD8";
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case R_RISCV_ADD16:
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return "R_RISCV_ADD16";
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case R_RISCV_ADD32:
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return "R_RISCV_ADD32";
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case R_RISCV_ADD64:
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return "R_RISCV_ADD64";
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case R_RISCV_SUB8:
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return "R_RISCV_SUB8";
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case R_RISCV_SUB16:
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return "R_RISCV_SUB16";
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case R_RISCV_SUB32:
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return "R_RISCV_SUB32";
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case R_RISCV_SUB64:
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return "R_RISCV_SUB64";
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case R_RISCV_RVC_BRANCH:
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return "R_RISCV_RVC_BRANCH";
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case R_RISCV_RVC_JUMP:
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return "R_RISCV_RVC_JUMP";
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case R_RISCV_SUB6:
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return "R_RISCV_SUB6";
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case R_RISCV_SET6:
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return "R_RISCV_SET6";
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case R_RISCV_SET8:
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return "R_RISCV_SET8";
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case R_RISCV_SET16:
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return "R_RISCV_SET16";
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case R_RISCV_SET32:
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return "R_RISCV_SET32";
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case R_RISCV_32_PCREL:
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return "R_RISCV_32_PCREL";
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case CallRelaxable:
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return "CallRelaxable";
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case AlignRelaxable:
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return "AlignRelaxable";
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}
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return getGenericEdgeKindName(K);
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}
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} // namespace riscv
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} // namespace jitlink
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} // namespace llvm
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