d01aec4c76
Set phi inputs to poison whenever we find a dead edge (either during initial worklist population or the main InstCombine run), instead of only doing this for successors of dead blocks. This means that the phi operand is set to poison even if for critical edges without an intermediate block. There are quite a few test changes, because the pattern is fairly common in vectorizer output, for cases where we know the vectorized loop will be entered.
35 lines
1.6 KiB
LLVM
35 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt %s -passes=loop-vectorize,instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -mtriple=x86_64-unknown-linux-gnu -mattr=avx512vl,avx512dq,avx512bw -S | FileCheck %s
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@bytes = global [128 x i8] zeroinitializer, align 16
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; Make sure we end up with vector code for this loop. We used to try to create
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; a VF=64,UF=4 loop, but the scalar trip count is only 128 so
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; the vector loop was dead code leaving only a scalar remainder.
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define zeroext i8 @sum() {
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; CHECK-LABEL: @sum(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <64 x i8>, ptr getelementptr inbounds ([128 x i8], ptr @bytes, i64 0, i64 64), align 16
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <64 x i8>, ptr @bytes, align 16
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; CHECK-NEXT: [[BIN_RDX:%.*]] = add <64 x i8> [[WIDE_LOAD2]], [[WIDE_LOAD]]
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; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.vector.reduce.add.v64i8(<64 x i8> [[BIN_RDX]])
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; CHECK-NEXT: ret i8 [[TMP0]]
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%r.010 = phi i8 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [128 x i8], ptr @bytes, i64 0, i64 %indvars.iv
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%0 = load i8, ptr %arrayidx, align 1
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%add = add i8 %0, %r.010
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 128
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%add.lcssa = phi i8 [ %add, %for.body ]
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ret i8 %add.lcssa
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}
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