fb54fec726
This patch adds a pass '-allocate-sme-tiles' to the ArmSME dialect that implements allocation of SME ZA tiles. It does this at the 'func.func' op level by replacing 'arm_sme.get_tile_id' ops with 'arith.constant' ops that represent the tile number. The tiles in use in a given function are tracked by an integer function attribute 'arm_sme.tiles_in_use' that is a 16-bit tile mask with a bit for each 128-bit element tile (ZA0.Q-ZA15.Q), the smallest ZA tile granule. This is initialized on the first 'arm_sme.get_tile_id' rewrite and updated on each subsequent rewrite. Mixing of different element tile types is supported. Section B2.3.2 of the SME spec [1] describes how the 128-bit element tiles overlap with other element tiles. Depends on D154941 [1] https://developer.arm.com/documentation/ddi0616/aa Reviewed By: awarzynski Differential Revision: https://reviews.llvm.org/D154955
199 lines
7.1 KiB
C++
199 lines
7.1 KiB
C++
//===- TileAllocation.cpp - Allocate SME ZA tiles -------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass allocates SME tiles at the 'func.func' op level for
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// 'arm_sme.get_tile_id' ops. It does this using a 16-bit tile mask that has a
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// bit for each 128-bit element tile (ZA0.Q-ZA15.Q), the smallest ZA tile
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// granule.
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//
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// The 128-bit tiles overlap with other element tiles as follows (see section
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// B2.3.2 of SME spec [1]):
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//
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// Tile Overlaps
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// ---------------------------------------------------------------------------
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// ZA0.B ZA0.Q, ZA1.Q, ZA2.Q, ZA3.Q, ZA4.Q, ZA5.Q, ZA6.Q, ZA7.Q, ZA8.Q,
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// ZA9.Q, ZA10.Q, ZA11.Q, ZA12.Q, ZA13.Q, ZA14.Q, ZA15.Q
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// ZA0.H ZA0.Q, ZA2.Q, ZA4.Q, ZA6.Q, ZA8.Q, ZA10.Q, ZA12.Q, ZA14.Q
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// ZA1.H ZA1.Q, ZA3.Q, ZA5.Q, ZA7.Q, ZA9.Q, ZA11.Q, ZA13.Q, ZA15.Q
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// ZA0.S ZA0.Q, ZA4.Q, ZA8.Q, ZA12.Q
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// ZA1.S ZA1.Q, ZA5.Q, ZA9.Q, ZA13.Q
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// ZA2.S ZA2.Q, ZA6.Q, ZA10.Q, ZA14.Q
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// ZA3.S ZA3.Q, ZA7.Q, ZA11.Q, ZA15.Q
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// ZA0.D ZA0.Q, ZA8.Q
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// ZA1.D ZA1.Q, ZA9.Q
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// ZA2.D ZA2.Q, ZA10.Q
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// ZA3.D ZA3.Q, ZA11.Q
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// ZA4.D ZA4.Q, ZA12.Q
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// ZA5.D ZA5.Q, ZA13.Q
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// ZA6.D ZA6.Q, ZA14.Q
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// ZA7.D ZA7.Q, ZA15.Q
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//
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// The tiles in use are tracked via a function attribute 'arm_sme.tiles_in_use'
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// that is initalized during the first 'arm_sme.get_tile_id' rewrite and
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// updated on each subsequent rewrite.
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//
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// [1] https://developer.arm.com/documentation/ddi0616/aa
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/ArmSME/IR/ArmSME.h"
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#include "mlir/Dialect/ArmSME/Transforms/Passes.h"
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#include "mlir/Dialect/Func/IR/FuncOps.h"
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#include "mlir/Transforms/DialectConversion.h"
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#define DEBUG_TYPE "allocate-arm-sme-tiles"
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namespace mlir {
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namespace arm_sme {
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#define GEN_PASS_DEF_TILEALLOCATION
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#include "mlir/Dialect/ArmSME/Transforms/Passes.h.inc"
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} // namespace arm_sme
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} // namespace mlir
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using namespace mlir;
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using namespace mlir::arm_sme;
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namespace {
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static constexpr char kTilesInUseAttr[] = "arm_sme.tiles_in_use";
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enum class TileMask : unsigned {
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// clang-format off
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kZA0B = 0xffff, // 1111 1111 1111 1111
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kZA0H = 0xaaaa, // 1010 1010 1010 1010
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kZA1H = 0x5555, // 0101 0101 0101 0101
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kZA0S = 0x8888, // 1000 1000 1000 1000
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kZA1S = 0x4444, // 0100 0100 0100 0100
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kZA2S = 0x2222, // 0010 0010 0010 0010
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kZA3S = 0x1111, // 0001 0001 0001 0001
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kZA0D = 0x8080, // 1000 0000 1000 0000
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kZA1D = 0x4040, // 0100 0000 0100 0000
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kZA2D = 0x2020, // 0010 0000 0010 0000
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kZA3D = 0x1010, // 0001 0000 0001 0000
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kZA4D = 0x808, // 0000 1000 0000 1000
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kZA5D = 0x404, // 0000 0100 0000 0100
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kZA6D = 0x202, // 0000 0010 0000 0010
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kZA7D = 0x101, // 0000 0001 0000 0001
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kZA0Q = 0x8000, // 1000 0000 0000 0000
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kZA1Q = 0x4000, // 0100 0000 0000 0000
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kZA2Q = 0x2000, // 0010 0000 0000 0000
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kZA3Q = 0x1000, // 0001 0000 0000 0000
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kZA4Q = 0x800, // 0000 1000 0000 0000
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kZA5Q = 0x400, // 0000 0100 0000 0000
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kZA6Q = 0x200, // 0000 0010 0000 0000
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kZA7Q = 0x100, // 0000 0001 0000 0000
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kZA8Q = 0x80, // 0000 0000 1000 0000
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kZA9Q = 0x40, // 0000 0000 0100 0000
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kZA10Q = 0x20, // 0000 0000 0010 0000
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kZA11Q = 0x10, // 0000 0000 0001 0000
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kZA12Q = 0x8, // 0000 0000 0000 1000
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kZA13Q = 0x4, // 0000 0000 0000 0100
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kZA14Q = 0x2, // 0000 0000 0000 0010
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kZA15Q = 0x1, // 0000 0000 0000 0001
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kNone = 0x0, // 0000 0000 0000 0000
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// clang-format on
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LLVM_MARK_AS_BITMASK_ENUM(kZA0B)
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};
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/// Returns the set of masks relevant for the given type.
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static ArrayRef<TileMask> getMasks(Type type) {
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static const SmallVector<TileMask> ZA_B_MASKS = {TileMask::kZA0B};
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static const SmallVector<TileMask> ZA_H_MASKS = {TileMask::kZA0H,
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TileMask::kZA1H};
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static const SmallVector<TileMask> ZA_S_MASKS = {
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TileMask::kZA0S, TileMask::kZA1S, TileMask::kZA2S, TileMask::kZA3S};
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static const SmallVector<TileMask> ZA_D_MASKS = {
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TileMask::kZA0D, TileMask::kZA1D, TileMask::kZA2D, TileMask::kZA3D,
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TileMask::kZA4D, TileMask::kZA5D, TileMask::kZA6D, TileMask::kZA7D};
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static const SmallVector<TileMask> ZA_Q_MASKS = {
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TileMask::kZA0Q, TileMask::kZA1Q, TileMask::kZA2Q, TileMask::kZA3Q,
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TileMask::kZA4Q, TileMask::kZA5Q, TileMask::kZA6Q, TileMask::kZA7Q,
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TileMask::kZA8Q, TileMask::kZA9Q, TileMask::kZA10Q, TileMask::kZA11Q,
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TileMask::kZA12Q, TileMask::kZA13Q, TileMask::kZA14Q, TileMask::kZA15Q};
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switch (cast<IntegerType>(type).getWidth()) {
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default:
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llvm_unreachable("unexpected type!");
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case 8:
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return ZA_B_MASKS;
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case 16:
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return ZA_H_MASKS;
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case 32:
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return ZA_S_MASKS;
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case 64:
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return ZA_D_MASKS;
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case 128:
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return ZA_Q_MASKS;
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}
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}
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/// Allocates a tile to 'tileID' or returns an error if there are no tiles left.
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static LogicalResult getTile(GetTileID tileIDOp, TileMask &tilesInUse,
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unsigned &tileID) {
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auto masks = getMasks(tileIDOp.getType());
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for (const auto &it : llvm::enumerate(masks)) {
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const auto tileMask = it.value();
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if ((tilesInUse & tileMask) == TileMask::kNone) {
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tilesInUse |= tileMask;
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tileID = it.index();
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return success();
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}
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}
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return tileIDOp.emitError("ran out of SME virtual tiles!");
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}
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struct GetTileIDConversion : public OpRewritePattern<GetTileID> {
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using OpRewritePattern::OpRewritePattern;
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LogicalResult matchAndRewrite(GetTileID tileIDOp,
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PatternRewriter &rewriter) const override {
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auto funcOp = tileIDOp->getParentOfType<func::FuncOp>();
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TileMask tilesInUse;
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if (auto tilesInUseAttr =
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funcOp->getAttrOfType<IntegerAttr>(kTilesInUseAttr))
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tilesInUse = static_cast<TileMask>(tilesInUseAttr.getInt());
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else
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tilesInUse = TileMask::kNone;
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unsigned tileID;
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if (failed(getTile(tileIDOp, tilesInUse, tileID)))
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return failure();
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funcOp->setAttr(kTilesInUseAttr,
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rewriter.getI32IntegerAttr((unsigned)tilesInUse));
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auto tileType = tileIDOp.getType();
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rewriter.replaceOpWithNewOp<arith::ConstantOp>(
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tileIDOp, tileType, rewriter.getIntegerAttr(tileType, tileID));
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return success();
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}
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};
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struct TileAllocationPass
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: public arm_sme::impl::TileAllocationBase<TileAllocationPass> {
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void runOnOperation() override {
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RewritePatternSet patterns(&getContext());
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ConversionTarget target(getContext());
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patterns.add<GetTileIDConversion>(patterns.getContext());
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target.addLegalOp<arith::ConstantOp>();
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target.addIllegalOp<GetTileID>();
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if (failed(applyPartialConversion(getOperation(), target,
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std::move(patterns))))
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signalPassFailure();
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}
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};
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} // namespace
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std::unique_ptr<Pass> mlir::arm_sme::createTileAllocationPass() {
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return std::make_unique<TileAllocationPass>();
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}
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