f75d46a7ec
This patch adds support for lowering vector.outerproduct to the ArmSME
MOPA intrinsic for the following types:
vector<[8]xf16>, vector<[8]xf16> -> vector<[8]x[8]xf16>
vector<[8]xbf16>, vector<[8]xbf16> -> vector<[8]x[8]xbf16>
vector<[4]xf32>, vector<[4]xf32> -> vector<[4]x[4]xf32>
vector<[2]xf64>, vector<[2]xf64> -> vector<[2]x[2]xf64>
The FP variants are lowered to FMOPA (non-widening) [1] and BFloat to
BFMOPA
(non-widening) [2].
Note at the ISA level these variants are implemented by different
architecture features, these are listed below:
FMOPA (non-widening)
* half-precision - +sme2p1,+sme-f16f16
* single-precision - +sme
* double-precision - +sme-f64f64
BFMOPA (non-widening)
* half-precision - +sme2p1,+b16b16
There's currently no way to target different features when lowering to
ArmSME. Integration tests are added for F32 and F64. We use QEMU to run
the integration tests but SME2 support isn't available yet, it's
targeted for 9.0, so integration tests for these variants excluded.
Masking is currently unsupported.
Depends on #65450.
[1] https://developer.arm.com/documentation/ddi0602/2023-06/SME-Instructions/FMOPA--non-widening---Floating-point-outer-product-and-accumulate-
[2] https://developer.arm.com/documentation/ddi0602/2023-06/SME-Instructions/BFMOPA--non-widening---BFloat16-floating-point-outer-product-and-accumulate-
45 lines
1.5 KiB
C++
45 lines
1.5 KiB
C++
//===- Utils.cpp - Utilities to support the ArmSME dialect ----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements utilities for the ArmSME dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/ArmSME/Utils/Utils.h"
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#include "mlir/Dialect/ArmSME/IR/ArmSME.h"
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using namespace mlir;
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using namespace mlir::arm_sme;
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unsigned mlir::arm_sme::getSMETileSliceMinNumElts(Type type) {
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assert(isValidSMETileElementType(type) && "invalid tile type!");
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return MinStreamingVectorLengthInBits / type.getIntOrFloatBitWidth();
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}
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bool mlir::arm_sme::isValidSMETileElementType(Type type) {
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return type.isInteger(8) || type.isInteger(16) || type.isInteger(32) ||
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type.isInteger(64) || type.isInteger(128) || type.isF16() ||
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type.isBF16() || type.isF32() || type.isF64() || type.isF128();
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}
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bool mlir::arm_sme::isValidSMETileVectorType(VectorType vType) {
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if ((vType.getRank() != 2) || !vType.allDimsScalable())
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return false;
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auto elemType = vType.getElementType();
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if (!isValidSMETileElementType(elemType))
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return false;
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unsigned minNumElts = arm_sme::getSMETileSliceMinNumElts(elemType);
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if (vType.getShape() != ArrayRef<int64_t>({minNumElts, minNumElts}))
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return false;
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return true;
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}
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