This revision avoids the registration of dialect extensions in Pass::getDependentDialects. Such registration of extensions can be dangerous because `DialectRegistry::isSubsetOf` is always guaranteed to return false for extensions (i.e. there is no mechanism to track whether a lambda is already in the list of already registered extensions). When the context is already in a multi-threaded mode, this is guaranteed to assert. Arguably a more structured registration mechanism for extensions with a unique ExtensionID could be envisioned in the future. In the process of cleaning this up, multiple usage inconsistencies surfaced around the registration of translation extensions that this revision also cleans up. Reviewed By: springerm Differential Revision: https://reviews.llvm.org/D157703
465 lines
17 KiB
C++
465 lines
17 KiB
C++
//===- LowerGPUToHSACO.cpp - Convert GPU kernel to HSACO blob -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a pass that serializes a gpu module into HSAco blob and
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// adds that blob as a string attribute of the module.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/GPU/Transforms/Passes.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/IR/Location.h"
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#include "mlir/IR/MLIRContext.h"
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#if MLIR_GPU_TO_HSACO_PASS_ENABLE
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#include "mlir/ExecutionEngine/OptUtils.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Support/FileUtilities.h"
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#include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
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#include "mlir/Target/LLVMIR/Export.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/GlobalVariable.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IRReader/IRReader.h"
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#include "llvm/Linker/Linker.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCParser/MCTargetAsmParser.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/FileUtilities.h"
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#include "llvm/Support/Path.h"
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#include "llvm/Support/Program.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TargetSelect.h"
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#include "llvm/Support/Threading.h"
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#include "llvm/Support/WithColor.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Transforms/IPO/Internalize.h"
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#include <optional>
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using namespace mlir;
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namespace {
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class SerializeToHsacoPass
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: public PassWrapper<SerializeToHsacoPass, gpu::SerializeToBlobPass> {
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static llvm::once_flag initializeBackendOnce;
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public:
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(SerializeToHsacoPass)
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SerializeToHsacoPass(StringRef triple, StringRef arch, StringRef features,
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int optLevel);
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SerializeToHsacoPass(const SerializeToHsacoPass &other);
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StringRef getArgument() const override { return "gpu-to-hsaco"; }
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StringRef getDescription() const override {
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return "Lower GPU kernel function to HSACO binary annotations";
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}
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protected:
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Option<std::string> rocmPath{*this, "rocm-path",
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llvm::cl::desc("Path to ROCm install")};
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// Overload to allow linking in device libs
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std::unique_ptr<llvm::Module>
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translateToLLVMIR(llvm::LLVMContext &llvmContext) override;
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private:
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// Loads LLVM bitcode libraries
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std::optional<SmallVector<std::unique_ptr<llvm::Module>, 3>>
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loadLibraries(SmallVectorImpl<char> &path,
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SmallVectorImpl<StringRef> &libraries,
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llvm::LLVMContext &context);
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// Serializes ROCDL to HSACO.
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std::unique_ptr<std::vector<char>>
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serializeISA(const std::string &isa) override;
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std::unique_ptr<SmallVectorImpl<char>> assembleIsa(const std::string &isa);
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std::unique_ptr<std::vector<char>>
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createHsaco(const SmallVectorImpl<char> &isaBinary);
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std::string getRocmPath();
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};
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} // namespace
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SerializeToHsacoPass::SerializeToHsacoPass(const SerializeToHsacoPass &other)
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: PassWrapper<SerializeToHsacoPass, gpu::SerializeToBlobPass>(other) {}
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/// Get a user-specified path to ROCm
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// Tries, in order, the --rocm-path option, the ROCM_PATH environment variable
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// and a compile-time default
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std::string SerializeToHsacoPass::getRocmPath() {
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if (rocmPath.getNumOccurrences() > 0)
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return rocmPath.getValue();
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return __DEFAULT_ROCM_PATH__;
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}
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// Sets the 'option' to 'value' unless it already has a value.
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static void maybeSetOption(Pass::Option<std::string> &option,
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function_ref<std::string()> getValue) {
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if (!option.hasValue())
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option = getValue();
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}
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llvm::once_flag SerializeToHsacoPass::initializeBackendOnce;
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SerializeToHsacoPass::SerializeToHsacoPass(StringRef triple, StringRef arch,
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StringRef features, int optLevel) {
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// No matter how this pass is constructed, ensure that the AMDGPU backend
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// is initialized exactly once.
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llvm::call_once(initializeBackendOnce, []() {
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// Initialize LLVM AMDGPU backend.
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LLVMInitializeAMDGPUAsmParser();
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LLVMInitializeAMDGPUAsmPrinter();
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LLVMInitializeAMDGPUTarget();
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LLVMInitializeAMDGPUTargetInfo();
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LLVMInitializeAMDGPUTargetMC();
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});
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maybeSetOption(this->triple, [&triple] { return triple.str(); });
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maybeSetOption(this->chip, [&arch] { return arch.str(); });
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maybeSetOption(this->features, [&features] { return features.str(); });
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if (this->optLevel.getNumOccurrences() == 0)
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this->optLevel.setValue(optLevel);
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}
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std::optional<SmallVector<std::unique_ptr<llvm::Module>, 3>>
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SerializeToHsacoPass::loadLibraries(SmallVectorImpl<char> &path,
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SmallVectorImpl<StringRef> &libraries,
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llvm::LLVMContext &context) {
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SmallVector<std::unique_ptr<llvm::Module>, 3> ret;
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size_t dirLength = path.size();
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if (!llvm::sys::fs::is_directory(path)) {
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getOperation().emitRemark() << "Bitcode path: " << path
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<< " does not exist or is not a directory\n";
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return std::nullopt;
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}
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for (const StringRef file : libraries) {
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llvm::SMDiagnostic error;
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llvm::sys::path::append(path, file);
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llvm::StringRef pathRef(path.data(), path.size());
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std::unique_ptr<llvm::Module> library =
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llvm::getLazyIRFileModule(pathRef, error, context);
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path.truncate(dirLength);
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if (!library) {
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getOperation().emitError() << "Failed to load library " << file
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<< " from " << path << error.getMessage();
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return std::nullopt;
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}
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// Some ROCM builds don't strip this like they should
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if (auto *openclVersion = library->getNamedMetadata("opencl.ocl.version"))
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library->eraseNamedMetadata(openclVersion);
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// Stop spamming us with clang version numbers
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if (auto *ident = library->getNamedMetadata("llvm.ident"))
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library->eraseNamedMetadata(ident);
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ret.push_back(std::move(library));
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}
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return std::move(ret);
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}
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std::unique_ptr<llvm::Module>
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SerializeToHsacoPass::translateToLLVMIR(llvm::LLVMContext &llvmContext) {
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// MLIR -> LLVM translation
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std::unique_ptr<llvm::Module> ret =
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gpu::SerializeToBlobPass::translateToLLVMIR(llvmContext);
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if (!ret) {
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getOperation().emitOpError("Module lowering failed");
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return ret;
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}
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// Walk the LLVM module in order to determine if we need to link in device
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// libs
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bool needOpenCl = false;
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bool needOckl = false;
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bool needOcml = false;
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for (llvm::Function &f : ret->functions()) {
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if (f.hasExternalLinkage() && f.hasName() && !f.hasExactDefinition()) {
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StringRef funcName = f.getName();
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if ("printf" == funcName)
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needOpenCl = true;
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if (funcName.startswith("__ockl_"))
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needOckl = true;
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if (funcName.startswith("__ocml_"))
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needOcml = true;
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}
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}
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if (needOpenCl)
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needOcml = needOckl = true;
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// No libraries needed (the typical case)
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if (!(needOpenCl || needOcml || needOckl))
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return ret;
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// Define one of the control constants the ROCm device libraries expect to be
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// present These constants can either be defined in the module or can be
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// imported by linking in bitcode that defines the constant. To simplify our
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// logic, we define the constants into the module we are compiling
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auto addControlConstant = [&module = *ret](StringRef name, uint32_t value,
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uint32_t bitwidth) {
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using llvm::GlobalVariable;
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if (module.getNamedGlobal(name)) {
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return;
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}
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llvm::IntegerType *type =
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llvm::IntegerType::getIntNTy(module.getContext(), bitwidth);
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auto *initializer = llvm::ConstantInt::get(type, value, /*isSigned=*/false);
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auto *constant = new GlobalVariable(
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module, type,
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/*isConstant=*/true, GlobalVariable::LinkageTypes::LinkOnceODRLinkage,
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initializer, name,
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/*before=*/nullptr,
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/*threadLocalMode=*/GlobalVariable::ThreadLocalMode::NotThreadLocal,
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/*addressSpace=*/4);
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constant->setUnnamedAddr(GlobalVariable::UnnamedAddr::Local);
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constant->setVisibility(
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GlobalVariable::VisibilityTypes::ProtectedVisibility);
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constant->setAlignment(llvm::MaybeAlign(bitwidth / 8));
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};
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// Set up control variables in the module instead of linking in tiny bitcode
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if (needOcml) {
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// TODO(kdrewnia): Enable math optimizations once we have support for
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// `-ffast-math`-like options
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addControlConstant("__oclc_finite_only_opt", 0, 8);
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addControlConstant("__oclc_daz_opt", 0, 8);
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addControlConstant("__oclc_correctly_rounded_sqrt32", 1, 8);
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addControlConstant("__oclc_unsafe_math_opt", 0, 8);
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}
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if (needOcml || needOckl) {
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addControlConstant("__oclc_wavefrontsize64", 1, 8);
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StringRef chipSet = this->chip.getValue();
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if (chipSet.startswith("gfx"))
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chipSet = chipSet.substr(3);
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uint32_t minor =
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llvm::APInt(32, chipSet.substr(chipSet.size() - 2), 16).getZExtValue();
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uint32_t major = llvm::APInt(32, chipSet.substr(0, chipSet.size() - 2), 10)
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.getZExtValue();
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uint32_t isaNumber = minor + 1000 * major;
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addControlConstant("__oclc_ISA_version", isaNumber, 32);
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// This constant must always match the default code object ABI version
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// of the AMDGPU backend.
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addControlConstant("__oclc_ABI_version", 400, 32);
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}
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// Determine libraries we need to link - order matters due to dependencies
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llvm::SmallVector<StringRef, 4> libraries;
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if (needOpenCl)
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libraries.push_back("opencl.bc");
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if (needOcml)
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libraries.push_back("ocml.bc");
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if (needOckl)
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libraries.push_back("ockl.bc");
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std::optional<SmallVector<std::unique_ptr<llvm::Module>, 3>> mbModules;
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std::string theRocmPath = getRocmPath();
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llvm::SmallString<32> bitcodePath(theRocmPath);
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llvm::sys::path::append(bitcodePath, "amdgcn", "bitcode");
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mbModules = loadLibraries(bitcodePath, libraries, llvmContext);
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if (!mbModules) {
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getOperation()
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.emitWarning("Could not load required device libraries")
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.attachNote()
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<< "This will probably cause link-time or run-time failures";
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return ret; // We can still abort here
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}
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llvm::Linker linker(*ret);
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for (std::unique_ptr<llvm::Module> &libModule : *mbModules) {
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// This bitcode linking code is substantially similar to what is used in
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// hip-clang It imports the library functions into the module, allowing LLVM
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// optimization passes (which must run after linking) to optimize across the
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// libraries and the module's code. We also only import symbols if they are
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// referenced by the module or a previous library since there will be no
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// other source of references to those symbols in this compilation and since
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// we don't want to bloat the resulting code object.
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bool err = linker.linkInModule(
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std::move(libModule), llvm::Linker::Flags::LinkOnlyNeeded,
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[](llvm::Module &m, const StringSet<> &gvs) {
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llvm::internalizeModule(m, [&gvs](const llvm::GlobalValue &gv) {
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return !gv.hasName() || (gvs.count(gv.getName()) == 0);
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});
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});
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// True is linker failure
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if (err) {
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getOperation().emitError(
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"Unrecoverable failure during device library linking.");
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// We have no guaranties about the state of `ret`, so bail
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return nullptr;
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}
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}
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return ret;
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}
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std::unique_ptr<SmallVectorImpl<char>>
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SerializeToHsacoPass::assembleIsa(const std::string &isa) {
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auto loc = getOperation().getLoc();
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SmallVector<char, 0> result;
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llvm::raw_svector_ostream os(result);
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llvm::Triple triple(llvm::Triple::normalize(this->triple));
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std::string error;
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const llvm::Target *target =
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llvm::TargetRegistry::lookupTarget(triple.normalize(), error);
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if (!target) {
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emitError(loc, Twine("failed to lookup target: ") + error);
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return {};
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}
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llvm::SourceMgr srcMgr;
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srcMgr.AddNewSourceBuffer(llvm::MemoryBuffer::getMemBuffer(isa), SMLoc());
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const llvm::MCTargetOptions mcOptions;
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std::unique_ptr<llvm::MCRegisterInfo> mri(
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target->createMCRegInfo(this->triple));
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std::unique_ptr<llvm::MCAsmInfo> mai(
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target->createMCAsmInfo(*mri, this->triple, mcOptions));
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mai->setRelaxELFRelocations(true);
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std::unique_ptr<llvm::MCSubtargetInfo> sti(
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target->createMCSubtargetInfo(this->triple, this->chip, this->features));
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llvm::MCContext ctx(triple, mai.get(), mri.get(), sti.get(), &srcMgr,
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&mcOptions);
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std::unique_ptr<llvm::MCObjectFileInfo> mofi(target->createMCObjectFileInfo(
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ctx, /*PIC=*/false, /*LargeCodeModel=*/false));
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ctx.setObjectFileInfo(mofi.get());
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SmallString<128> cwd;
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if (!llvm::sys::fs::current_path(cwd))
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ctx.setCompilationDir(cwd);
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std::unique_ptr<llvm::MCStreamer> mcStreamer;
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std::unique_ptr<llvm::MCInstrInfo> mcii(target->createMCInstrInfo());
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llvm::MCCodeEmitter *ce = target->createMCCodeEmitter(*mcii, ctx);
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llvm::MCAsmBackend *mab = target->createMCAsmBackend(*sti, *mri, mcOptions);
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mcStreamer.reset(target->createMCObjectStreamer(
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triple, ctx, std::unique_ptr<llvm::MCAsmBackend>(mab),
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mab->createObjectWriter(os), std::unique_ptr<llvm::MCCodeEmitter>(ce),
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*sti, mcOptions.MCRelaxAll, mcOptions.MCIncrementalLinkerCompatible,
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/*DWARFMustBeAtTheEnd*/ false));
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mcStreamer->setUseAssemblerInfoForParsing(true);
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std::unique_ptr<llvm::MCAsmParser> parser(
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createMCAsmParser(srcMgr, ctx, *mcStreamer, *mai));
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std::unique_ptr<llvm::MCTargetAsmParser> tap(
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target->createMCAsmParser(*sti, *parser, *mcii, mcOptions));
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if (!tap) {
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emitError(loc, "assembler initialization error");
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return {};
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}
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parser->setTargetParser(*tap);
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parser->Run(false);
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return std::make_unique<SmallVector<char, 0>>(std::move(result));
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}
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std::unique_ptr<std::vector<char>>
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SerializeToHsacoPass::createHsaco(const SmallVectorImpl<char> &isaBinary) {
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auto loc = getOperation().getLoc();
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// Save the ISA binary to a temp file.
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int tempIsaBinaryFd = -1;
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SmallString<128> tempIsaBinaryFilename;
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if (llvm::sys::fs::createTemporaryFile("kernel", "o", tempIsaBinaryFd,
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tempIsaBinaryFilename)) {
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emitError(loc, "temporary file for ISA binary creation error");
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return {};
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}
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llvm::FileRemover cleanupIsaBinary(tempIsaBinaryFilename);
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llvm::raw_fd_ostream tempIsaBinaryOs(tempIsaBinaryFd, true);
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tempIsaBinaryOs << StringRef(isaBinary.data(), isaBinary.size());
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tempIsaBinaryOs.close();
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// Create a temp file for HSA code object.
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int tempHsacoFD = -1;
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SmallString<128> tempHsacoFilename;
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if (llvm::sys::fs::createTemporaryFile("kernel", "hsaco", tempHsacoFD,
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tempHsacoFilename)) {
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emitError(loc, "temporary file for HSA code object creation error");
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return {};
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}
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llvm::FileRemover cleanupHsaco(tempHsacoFilename);
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std::string theRocmPath = getRocmPath();
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llvm::SmallString<32> lldPath(theRocmPath);
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llvm::sys::path::append(lldPath, "llvm", "bin", "ld.lld");
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int lldResult = llvm::sys::ExecuteAndWait(
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lldPath,
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{"ld.lld", "-shared", tempIsaBinaryFilename, "-o", tempHsacoFilename});
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if (lldResult != 0) {
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emitError(loc, "lld invocation error");
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return {};
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}
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// Load the HSA code object.
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auto hsacoFile = openInputFile(tempHsacoFilename);
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if (!hsacoFile) {
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emitError(loc, "read HSA code object from temp file error");
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return {};
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}
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StringRef buffer = hsacoFile->getBuffer();
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return std::make_unique<std::vector<char>>(buffer.begin(), buffer.end());
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}
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std::unique_ptr<std::vector<char>>
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SerializeToHsacoPass::serializeISA(const std::string &isa) {
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auto isaBinary = assembleIsa(isa);
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if (!isaBinary)
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return {};
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return createHsaco(*isaBinary);
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}
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// Register pass to serialize GPU kernel functions to a HSACO binary annotation.
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void mlir::registerGpuSerializeToHsacoPass() {
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PassRegistration<SerializeToHsacoPass> registerSerializeToHSACO([] {
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return std::make_unique<SerializeToHsacoPass>("amdgcn-amd-amdhsa", "", "",
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2);
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|
});
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|
}
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/// Create an instance of the GPU kernel function to HSAco binary serialization
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/// pass.
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std::unique_ptr<Pass> mlir::createGpuSerializeToHsacoPass(StringRef triple,
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|
StringRef arch,
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StringRef features,
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int optLevel) {
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return std::make_unique<SerializeToHsacoPass>(triple, arch, features,
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|
optLevel);
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}
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|
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#else // MLIR_GPU_TO_HSACO_PASS_ENABLE
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void mlir::registerGpuSerializeToHsacoPass() {}
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#endif // MLIR_GPU_TO_HSACO_PASS_ENABLE
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