Files
clang-p2996/llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
Jay Foad 988d84a5fc [CodeGen] Add machine verification to a couple of tests
This helps to provoke a couple of errors when I apply D129208 that would
otherwise only show up in an LLVM_ENABLE_EXPENSIVE_CHECKS build.
2023-04-04 17:17:57 +01:00

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# RUN: llc -march=amdgcn -run-pass liveintervals -debug-only=regalloc -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: asserts
# CHECK: INTERVALS
# CHECK: %0
# CHECK-LABEL: Machine code for function test0:
# CHECK: INTERVALS
# CHECK: %0
# CHECK-LABEL: Machine code for function test1:
--- |
define amdgpu_kernel void @test0() { ret void }
define amdgpu_kernel void @test1() { ret void }
...
---
name: test0
registers:
- { id: 0, class: sreg_64 }
body: |
bb.0:
S_NOP 0, implicit-def %0
S_NOP 0, implicit %0
S_NOP 0, implicit-def undef %0.sub0
S_NOP 0, implicit %0
...
---
name: test1
registers:
- { id: 0, class: sreg_64 }
body: |
bb.0:
S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
S_BRANCH %bb.2
bb.1:
S_NOP 0, implicit-def undef %0.sub0
S_BRANCH %bb.3
bb.2:
S_NOP 0, implicit-def %0
S_BRANCH %bb.3
bb.3:
S_NOP 0
S_NOP 0, implicit %0
...