b85a402dd8
This patch adds a new preheader block the VPlan to place SCEV expansions expansions like the trip count. This preheader block is disconnected at the moment, as the bypass blocks of the skeleton are not yet modeled in VPlan. The preheader block is executed before skeleton creation, so the SCEV expansion results can be used during skeleton creation. At the moment, the trip count expression and induction steps are expanded in the new preheader. The remainder of SCEV expansions will be moved gradually in the future. D147965 will update skeleton creation to use the steps expanded in the pre-header to fix #58811. Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D147964
235 lines
9.8 KiB
LLVM
235 lines
9.8 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -debug -disable-output %s 2>&1 | FileCheck --check-prefix=DBG %s
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; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck %s
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; DBG-LABEL: 'test_scalarize_call'
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; DBG: VPlan 'Initial VPlan for VF={1},UF>=1' {
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; DBG-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
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; DBG-NEXT: vp<[[TC:%.+]]> = original trip-count
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; DBG-EMPTY:
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; DBG-NEXT: ph:
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; DBG-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (1000 + (-1 * %start))
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; DBG-NEXT: No successors
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; DBG-EMPTY:
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; DBG-NEXT: vector.ph:
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; DBG-NEXT: Successor(s): vector loop
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; DBG-EMPTY:
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; DBG-NEXT: <x1> vector loop: {
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; DBG-NEXT: vector.body:
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; DBG-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; DBG-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<%start> + vp<[[CAN_IV]]> * ir<1>
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; DBG-NEXT: vp<[[IV_STEPS:%.]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<1>
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; DBG-NEXT: CLONE ir<%min> = call @llvm.smin.i32(vp<[[IV_STEPS]]>, ir<65535>)
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; DBG-NEXT: CLONE ir<%arrayidx> = getelementptr ir<%dst>, vp<[[IV_STEPS]]>
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; DBG-NEXT: CLONE store ir<%min>, ir<%arrayidx>
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; DBG-NEXT: EMIT vp<[[INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
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; DBG-NEXT: EMIT branch-on-count vp<[[INC]]> vp<[[VEC_TC]]>
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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;
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define void @test_scalarize_call(i32 %start, ptr %dst) {
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; CHECK-LABEL: @test_scalarize_call(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i32 %start, [[INDEX]]
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; CHECK-NEXT: [[INDUCTION:%.*]] = add i32 [[OFFSET_IDX]], 0
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; CHECK-NEXT: [[INDUCTION1:%.*]] = add i32 [[OFFSET_IDX]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.smin.i32(i32 [[INDUCTION]], i32 65535)
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; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @llvm.smin.i32(i32 [[INDUCTION1]], i32 65535)
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i32 [[INDUCTION]]
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[DST]], i32 [[INDUCTION1]]
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; CHECK-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 8
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; CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP4]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], %n.vec
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; CHECK-NEXT: br i1 [[TMP5]], label %middle.block, label %vector.body
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; CHECK: middle.block:
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ]
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%min = tail call i32 @llvm.smin.i32(i32 %iv, i32 65535)
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%arrayidx = getelementptr inbounds i32 , ptr %dst, i32 %iv
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store i32 %min, ptr %arrayidx, align 8
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%iv.next = add nsw i32 %iv, 1
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%tobool.not = icmp eq i32 %iv.next, 1000
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br i1 %tobool.not, label %exit, label %loop
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exit:
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ret void
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}
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declare i32 @llvm.smin.i32(i32, i32)
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; DBG-LABEL: 'test_scalarize_with_branch_cond'
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; DBG: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
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; DBG-NEXT: Live-in ir<1000> = original trip-count
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; DBG-EMPTY:
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; DBG-NEXT: vector.ph:
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; DBG-NEXT: Successor(s): vector loop
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; DBG-EMPTY:
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; DBG-NEXT: <x1> vector loop: {
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; DBG-NEXT: vector.body:
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; DBG-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; DBG-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<false> + vp<[[CAN_IV]]> * ir<true>
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; DBG-NEXT: vp<[[STEPS1:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<true>
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; DBG-NEXT: Successor(s): pred.store
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; DBG-EMPTY:
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; DBG-NEXT: <xVFxUF> pred.store: {
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; DBG-NEXT: pred.store.entry:
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; DBG-NEXT: BRANCH-ON-MASK vp<[[STEPS1]]>
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; DBG-NEXT: Successor(s): pred.store.if, pred.store.continue
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; DBG-EMPTY:
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; DBG-NEXT: pred.store.if:
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; DBG-NEXT: vp<[[STEPS2:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
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; DBG-NEXT: CLONE ir<%gep.src> = getelementptr ir<%src>, vp<[[STEPS2]]>
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; DBG-NEXT: CLONE ir<%l> = load ir<%gep.src>
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; DBG-NEXT: CLONE ir<%gep.dst> = getelementptr ir<%dst>, vp<[[STEPS2]]>
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; DBG-NEXT: CLONE store ir<%l>, ir<%gep.dst>
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; DBG-NEXT: Successor(s): pred.store.continue
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; DBG-EMPTY:
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; DBG-NEXT: pred.store.continue:
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; DBG-NEXT: PHI-PREDICATED-INSTRUCTION vp<{{.+}}> = ir<%l>
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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; DBG-NEXT: Successor(s): cond.false.1
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; DBG-EMPTY:
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; DBG-NEXT: cond.false.1:
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; DBG-NEXT: EMIT vp<[[CAN_IV_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
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; DBG-NEXT: EMIT branch-on-count vp<[[CAN_IV_INC]]> vp<[[VEC_TC]]>
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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; DBG-NEXT: Successor(s): middle.block
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; DBG-EMPTY:
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; DBG-NEXT: middle.block:
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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define void @test_scalarize_with_branch_cond(ptr %src, ptr %dst) {
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; CHECK-LABEL: @test_scalarize_with_branch_cond(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %pred.store.continue5 ]
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; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i1
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i1 false, [[TMP0]]
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; CHECK-NEXT: [[INDUCTION:%.*]] = add i1 [[OFFSET_IDX]], false
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; CHECK-NEXT: [[INDUCTION3:%.*]] = add i1 [[OFFSET_IDX]], true
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; CHECK-NEXT: br i1 [[INDUCTION]], label %pred.store.if, label %pred.store.continue
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; CHECK: pred.store.if:
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; CHECK-NEXT: [[INDUCTION4:%.*]] = add i64 [[INDEX]], 0
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr %src, i64 [[INDUCTION4]]
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr %dst, i64 [[INDUCTION4]]
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; CHECK-NEXT: store i32 [[TMP4]], ptr [[TMP1]], align 4
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; CHECK-NEXT: br label %pred.store.continue
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; CHECK: pred.store.continue:
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; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ poison, %vector.body ], [ [[TMP4]], %pred.store.if ]
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; CHECK-NEXT: br i1 [[INDUCTION3]], label %pred.store.if4, label %pred.store.continue5
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; CHECK: pred.store.if4:
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; CHECK-NEXT: [[INDUCTION5:%.*]] = add i64 [[INDEX]], 1
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; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr %src, i64 [[INDUCTION5]]
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; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr %dst, i64 [[INDUCTION5]]
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; CHECK-NEXT: store i32 [[TMP7]], ptr [[TMP2]], align 4
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; CHECK-NEXT: br label %pred.store.continue5
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; CHECK: pred.store.continue5:
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; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ poison, %pred.store.continue ], [ [[TMP7]], %pred.store.if4 ]
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 [[TMP9]], label %middle.block, label %vector.body
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; CHECK: middle.block:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%d = phi i1 [ false, %entry ], [ %d.next, %loop.latch ]
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%d.next = xor i1 %d, true
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br i1 %d, label %cond.false, label %loop.latch
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cond.false:
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%gep.src = getelementptr inbounds i32, ptr %src, i64 %iv
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%gep.dst = getelementptr inbounds i32, ptr %dst, i64 %iv
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%l = load i32, ptr %gep.src, align 4
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store i32 %l, ptr %gep.dst
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br label %loop.latch
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loop.latch:
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%iv.next = add nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 1000
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br i1 %ec, label %exit, label %loop.header
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exit:
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ret void
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}
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; Make sure the widened induction gets replaced by scalar-steps for plans
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; including the scalar VF, if it is used in first-order recurrences.
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; DBG-LABEL: 'first_order_recurrence_using_induction'
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; DBG: VPlan 'Initial VPlan for VF={1},UF>=1' {
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; DBG-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
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; DBG-NEXT: vp<[[TC:%.+]]> = original trip-count
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; DBG-EMPTY:
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; DBG-NEXT: ph:
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; DBG-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (zext i32 (1 smax %n) to i64)
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; DBG-NEXT: No successors
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; DBG-EMPTY:
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; DBG-NEXT: vector.ph:
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; DBG-NEXT: Successor(s): vector loop
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; DBG-EMPTY:
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; DBG-NEXT: <x1> vector loop: {
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; DBG-NEXT: vector.body:
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; DBG-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; DBG-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for> = phi ir<0>, vp<[[SCALAR_STEPS:.+]]>
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; DBG-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<0> + vp<[[CAN_IV]]> * ir<1> (truncated to i32)
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; DBG-NEXT: vp<[[SCALAR_STEPS]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<1>
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; DBG-NEXT: EMIT vp<[[SPLICE:%.+]]> = first-order splice ir<%for> vp<[[SCALAR_STEPS]]>
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; DBG-NEXT: CLONE store vp<[[SPLICE]]>, ir<%dst>
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; DBG-NEXT: EMIT vp<[[IV_INC:%.+]]> = VF * UF +(nuw) vp<[[CAN_IV]]>
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; DBG-NEXT: EMIT branch-on-count vp<[[IV_INC]]> vp<[[VTC]]>
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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; DBG-NEXT: Successor(s): middle.block
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; DBG-EMPTY:
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; DBG-NEXT: middle.block:
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; DBG-NEXT: No successors
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; DBG-NEXT: }
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define void @first_order_recurrence_using_induction(i32 %n, ptr %dst) {
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; CHECK-LABEL: @first_order_recurrence_using_induction(
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
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; CHECK-NEXT: [[VECTOR_RECUR:%.*]] = phi i32 [ 0, %vector.ph ], [ [[INDUCTION1:%.*]], %vector.body ]
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; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[INDEX]] to i32
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; CHECK-NEXT: [[INDUCTION:%.*]] = add i32 [[TMP3]], 0
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; CHECK-NEXT: [[INDUCTION1]] = add i32 [[TMP3]], 1
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; CHECK-NEXT: store i32 [[VECTOR_RECUR]], ptr [[DST:%.*]], align 4
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; CHECK-NEXT: store i32 [[INDUCTION]], ptr [[DST]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], %n.vec
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; CHECK-NEXT: br i1 [[TMP4]], label %middle.block, label %vector.body
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; CHECK: middle.block:
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ],[ %iv.next, %loop ]
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%for = phi i32 [ 0, %entry ], [ %iv.trunc, %loop ]
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%iv.trunc = trunc i64 %iv to i32
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store i32 %for, ptr %dst
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%iv.next = add nuw nsw i64 %iv, 1
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%iv.next.trunc = trunc i64 %iv.next to i32
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%ec = icmp slt i32 %iv.next.trunc, %n
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br i1 %ec, label %loop, label %exit
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exit:
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ret void
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}
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