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clang-p2996/llvm/lib/Target/AArch64
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Matt Arsenault d6f9428e46 GlobalISel: Pass MachineIRBuilder to applyMappingImpl 
The target should not have to construct MachineIRBuilders during
RegBankSelect (we should perhaps hide the constructors for it). The
pass should own the builder setup with the desired CSE configuration
(although currently the pass does not use the CSE builder, which is
what I want to fix).

https://reviews.llvm.org/D156479
2023-07-31 10:03:38 -04:00
..
AsmParser
[AArch64] Replace OperandMatchResultTy with ParseStatus (NFC)
2023-07-14 02:21:45 +03:00
Disassembler
[AArch64] Remove global constructors from AArch64Disassembler.cpp.
2023-05-09 10:37:20 -07:00
GISel
GlobalISel: Pass MachineIRBuilder to applyMappingImpl
2023-07-31 10:03:38 -04:00
MCTargetDesc
[AArch64] Switch magic numbers to library functions in fixup
2023-07-27 21:27:11 +00:00
TargetInfo
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Utils
Move SubtargetFeature.h from MC to TargetParser
2023-06-26 11:20:08 +02:00
AArch64.h
[CodeGen][KCFI] Move cfi-type lowering to TargetLowering
2023-05-09 18:38:54 +00:00
AArch64.td
[AArch64] Add scheduling model for Neoverse V1
2023-07-17 17:41:59 -05:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
[AArch64][SME] Use fmov instead of NEON movi for FP value.
2023-07-24 08:48:19 +00:00
AArch64BranchTargets.cpp
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AArch64CallingConvention.cpp
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AArch64CallingConvention.h
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AArch64CallingConvention.td
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64Combine.td
[AArch64] Split lowerVectorFCMP combine
2023-07-12 13:13:37 +02:00
AArch64CompressJumpTables.cpp
[AArch64CompressJumpTables] Prevent over-compression caused by invalid alignment.
2023-06-15 12:38:20 +00:00
AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
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AArch64ConditionOptimizer.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandImm.cpp
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AArch64ExpandImm.h
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AArch64ExpandPseudoInsts.cpp
[ARM,AArch64] Add a full set of -mtp= options.
2023-06-15 09:27:41 +01:00
AArch64FalkorHWPFFix.cpp
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AArch64FastISel.cpp
[CodeGen] Replace CCState's getNextStackOffset with getStackSize (NFC)
2023-05-17 21:51:45 +03:00
AArch64FrameLowering.cpp
[AArch64][Windows] Fix the slot offset of the swift async context register.
2023-07-27 12:32:43 -07:00
AArch64FrameLowering.h
[AArch64] Emit fewer CFI instructions for synchronous unwind tables
2023-07-01 16:31:09 -07:00
AArch64GenRegisterBankInfo.def
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AArch64GlobalsTagging.cpp
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AArch64InstrAtomics.td
[AArch64][RCPC3] Instruction selection for LDAP1/STL1 instructions
2023-07-07 12:32:56 +01:00
AArch64InstrFormats.td
[AArch64] Add funnel shift lowering for SelectionDAG
2023-07-28 11:56:25 +01:00
AArch64InstrGISel.td
[AArch64][GlobalISel] Add support for some across-vector NEON intrinsics
2023-04-05 12:59:55 +02:00
AArch64InstrInfo.cpp
[AArch64] [XRay] Account for XRay event instrs in Branch Relaxation
2023-07-27 17:10:58 +00:00
AArch64InstrInfo.h
[AArch64] Neoverse V2 scheduling model
2023-06-14 15:19:42 +00:00
AArch64InstrInfo.td
[AArch64] Lower fcvtl2 (fpext) via tablegen patterns.
2023-07-23 19:17:11 +01:00
AArch64ISelDAGToDAG.cpp
[AArch64] Lower fcvtl2 (fpext) via tablegen patterns.
2023-07-23 19:17:11 +01:00
AArch64ISelLowering.cpp
[AArch64] Add funnel shift lowering for SelectionDAG
2023-07-28 11:56:25 +01:00
AArch64ISelLowering.h
[AArch64] Add funnel shift lowering for SelectionDAG
2023-07-28 11:56:25 +01:00
AArch64LoadStoreOptimizer.cpp
Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"
2023-07-26 16:22:24 +02:00
AArch64LowerHomogeneousPrologEpilog.cpp
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AArch64MachineFunctionInfo.cpp
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AArch64MachineFunctionInfo.h
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AArch64MachineScheduler.cpp
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AArch64MachineScheduler.h
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AArch64MacroFusion.cpp
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AArch64MacroFusion.h
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AArch64MCInstLower.cpp
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AArch64MCInstLower.h
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AArch64MIPeepholeOpt.cpp
[AArch64] Fix order of isReg and isDef checks in INSvi64 peephole.
2023-07-12 09:51:28 +01:00
AArch64PBQPRegAlloc.cpp
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
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AArch64RegisterBanks.td
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AArch64RegisterInfo.cpp
[AArch64][Windows] Fix the callee-saved registers for swiftcc on Windows/AArch64
2023-07-12 13:13:21 -07:00
AArch64RegisterInfo.h
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AArch64RegisterInfo.td
[AArch64][GlobalISel] Add support for some across-vector NEON intrinsics
2023-04-05 12:59:55 +02:00
AArch64SchedA53.td
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AArch64SchedA55.td
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AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
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AArch64SchedA64FX.td
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AArch64SchedA510.td
[AArch64] Update SVE scheduling of some CPUs
2023-07-04 10:41:56 +01:00
AArch64SchedAmpere1.td
[AArch64] Remove duplicate code (NFC)
2023-07-01 13:29:55 -05:00
AArch64SchedCyclone.td
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AArch64SchedExynosM3.td
[AArch64] Predicate for ROR immediate
2023-05-18 15:00:18 -05:00
AArch64SchedExynosM4.td
[AArch64] Predicate for ROR immediate
2023-05-18 15:00:18 -05:00
AArch64SchedExynosM5.td
[AArch64] Predicate for ROR immediate
2023-05-18 15:00:18 -05:00
AArch64SchedFalkor.td
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AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
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AArch64SchedKryoDetails.td
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AArch64SchedNeoverseN1.td
[AArch64] Remove duplicate code (NFC)
2023-07-01 13:29:55 -05:00
AArch64SchedNeoverseN2.td
[AArch64] Remove duplicate code (NFC)
2023-07-01 13:29:55 -05:00
AArch64SchedNeoverseV1.td
[AArch64] Add scheduling model for Neoverse V1
2023-07-17 17:41:59 -05:00
AArch64SchedNeoverseV2.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredExynos.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredicates.td
[AArch64] Refactor predicate to check for a ZR operand (NFC)
2023-07-07 19:19:24 -05:00
AArch64SchedPredNeoverse.td
[AArch64] Add scheduling model for Neoverse V1
2023-07-17 17:41:59 -05:00
AArch64SchedThunderX2T99.td
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AArch64SchedThunderX3T110.td
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AArch64SchedThunderX.td
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AArch64SchedTSV110.td
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AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64SIMDInstrOpt.cpp
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AArch64SLSHardening.cpp
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AArch64SMEInstrInfo.td
[AArch64][SME] Rename strided load/store enums
2023-06-20 16:22:01 +00:00
AArch64SpeculationHardening.cpp
[AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
2023-05-23 09:21:17 +01:00
AArch64StackTagging.cpp
[NFC] Rename isPointerOffset to getPointerOffsetFrom and move to Value.h
2023-04-19 12:22:58 +01:00
AArch64StackTaggingPreRA.cpp
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AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
[AArch64] Force streaming-compatible codegen when attributes are set.
2023-07-18 10:26:00 +00:00
AArch64Subtarget.h
[AArch64] Change the cost of vector insert/extract to 2
2023-07-28 21:26:50 +01:00
AArch64SVEInstrInfo.td
[SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used for the false lanes.
2023-07-25 10:02:32 +00:00
AArch64SystemOperands.td
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AArch64TargetMachine.cpp
Reland [AArch64][NFC] Call the API getVScaleRange directly
2023-07-26 18:55:31 +08:00
AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
[AArch64] Change the cost of vector insert/extract to 2
2023-07-28 21:26:50 +01:00
AArch64TargetTransformInfo.h
[AArch64] Change the cost of vector insert/extract to 2
2023-07-28 21:26:50 +01:00
CMakeLists.txt
[AArch64] Use GlobalISel MatchTable Combiner Backend
2023-07-11 11:27:14 +02:00
SMEABIPass.cpp
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SMEInstrFormats.td
[SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
2023-05-22 13:52:06 +00:00
SVEInstrFormats.td
[SVE] Add isel for 32-bit add/sub(cntp()) -> incp/decp.
2023-07-06 14:25:18 +00:00
SVEIntrinsicOpts.cpp
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