0464e07c8f
Summary: Change the vsqadd scalar instrinsics to have the second argument as signed values, not unsigned, accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics The existing unsigned argument can cause faulty code as negative float to unsigned conversion is undefined, which llvm/clang optimizes away. Reviewers: LukeCheeseman, john.brawn Reviewed By: john.brawn Subscribers: john.brawn, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64239 llvm-svn: 365298
50 lines
1.6 KiB
C
50 lines
1.6 KiB
C
// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
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// RUN: -S -disable-O0-optnone -emit-llvm -o - %s | opt -S -mem2reg -dce \
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// RUN: | FileCheck %s
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#include <arm_neon.h>
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// Check float conversion is accepted for int argument
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uint8_t test_vsqaddb_u8(){
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return vsqaddb_u8(1, -1.0f);
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}
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uint16_t test_vsqaddh_u16() {
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return vsqaddh_u16(1, -1.0f);
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}
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uint32_t test_vsqadds_u32() {
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return vsqadds_u32(1, -1.0f);
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}
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uint64_t test_vsqaddd_u64() {
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return vsqaddd_u64(1, -1.0f);
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}
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// CHECK-LABEL: @test_vsqaddb_u8()
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// CHECK: entry:
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// CHECK-NEXT: [[T0:%.*]] = insertelement <8 x i8> undef, i8 1, i64 0
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// CHECK-NEXT: [[T1:%.*]] = insertelement <8 x i8> undef, i8 -1, i64 0
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// CHECK-NEXT: [[V:%.*]] = call <8 x i8> @llvm.aarch64.neon.usqadd.v8i8(<8 x i8> [[T0]], <8 x i8> [[T1]])
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// CHECK-NEXT: [[R:%.*]] = extractelement <8 x i8> [[V]], i64 0
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// CHECK-NEXT: ret i8 [[R]]
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// CHECK-LABEL: @test_vsqaddh_u16()
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// CHECK: entry:
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// CHECK-NEXT: [[T0:%.*]] = insertelement <4 x i16> undef, i16 1, i64 0
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// CHECK-NEXT: [[T1:%.*]] = insertelement <4 x i16> undef, i16 -1, i64 0
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// CHECK-NEXT: [[V:%.*]] = call <4 x i16> @llvm.aarch64.neon.usqadd.v4i16(<4 x i16> [[T0]], <4 x i16> [[T1]])
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// CHECK-NEXT: [[R:%.*]] = extractelement <4 x i16> [[V]], i64 0
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// CHECK-NEXT: ret i16 [[R]]
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// CHECK-LABEL: @test_vsqadds_u32()
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// CHECK: entry:
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// CHECK-NEXT: [[V:%.*]] = call i32 @llvm.aarch64.neon.usqadd.i32(i32 1, i32 -1)
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// CHECK-NEXT: ret i32 [[V]]
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// CHECK-LABEL: @test_vsqaddd_u64()
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// CHECK: entry:
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// CHECK-NEXT: [[V:%.*]] = call i64 @llvm.aarch64.neon.usqadd.i64(i64 1, i64 -1)
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// CHECK-NEXT: ret i64 [[V]]
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