11bf7da64a
The GPUDivergenceAnalysis is now renamed to just "DivergenceAnalysis" since there is no conflict with LegacyDivergenceAnalysis. In the legacy PM, this analysis can only be used through the legacy DA serving as a wrapper. It is now made available as a pass in the new PM, and has no relation with the legacy DA. The new DA currently cannot handle irreducible control flow; its presence can cause the analysis to run indefinitely. The analysis is now modified to detect this and report all instructions in the function as divergent. This is super conservative, but allows the analysis to be used without hanging the compiler. Reviewed By: aeubanks Differential Revision: https://reviews.llvm.org/D96615
63 lines
3.0 KiB
LLVM
63 lines
3.0 KiB
LLVM
; RUN: opt -mtriple=amdgcn-- -enable-new-pm=0 -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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; RUN: opt -mtriple amdgcn-- -passes='print<divergence>' -disable-output %s 2>&1 | FileCheck %s
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; CHECK: DIVERGENT: %swizzle = call i32 @llvm.amdgcn.ds.swizzle(i32 %src, i32 100) #0
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define amdgpu_kernel void @ds_swizzle(i32 addrspace(1)* %out, i32 %src) #0 {
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%swizzle = call i32 @llvm.amdgcn.ds.swizzle(i32 %src, i32 100) #0
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store i32 %swizzle, i32 addrspace(1)* %out, align 4
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ret void
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}
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; CHECK: DIVERGENT: %v = call i32 @llvm.amdgcn.permlane16(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false) #0
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define amdgpu_kernel void @v_permlane16_b32(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) #0 {
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%v = call i32 @llvm.amdgcn.permlane16(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false) #0
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store i32 %v, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: DIVERGENT: %v = call i32 @llvm.amdgcn.permlanex16(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false) #0
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define amdgpu_kernel void @v_permlanex16_b32(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) #0 {
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%v = call i32 @llvm.amdgcn.permlanex16(i32 %src0, i32 %src0, i32 %src1, i32 %src2, i1 false, i1 false) #0
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store i32 %v, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: DIVERGENT: %tmp0 = call i32 @llvm.amdgcn.update.dpp.i32(i32 %in1, i32 %in2, i32 1, i32 1, i32 1, i1 false) #0
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define amdgpu_kernel void @update_dpp(i32 addrspace(1)* %out, i32 %in1, i32 %in2) #0 {
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%tmp0 = call i32 @llvm.amdgcn.update.dpp.i32(i32 %in1, i32 %in2, i32 1, i32 1, i32 1, i1 false) #0
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store i32 %tmp0, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: DIVERGENT: %tmp0 = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %in, i32 1, i32 1, i32 1, i1 true) #0
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define amdgpu_kernel void @mov_dpp(i32 addrspace(1)* %out, i32 %in) #0 {
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%tmp0 = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %in, i32 1, i32 1, i32 1, i1 true) #0
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store i32 %tmp0, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: DIVERGENT: %tmp0 = call i32 @llvm.amdgcn.mov.dpp8.i32(i32 %in, i32 1) #0
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define amdgpu_kernel void @mov_dpp8(i32 addrspace(1)* %out, i32 %in) #0 {
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%tmp0 = call i32 @llvm.amdgcn.mov.dpp8.i32(i32 %in, i32 1) #0
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store i32 %tmp0, i32 addrspace(1)* %out
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ret void
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}
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; CHECK: DIVERGENT: %tmp0 = call i32 @llvm.amdgcn.writelane(i32 0, i32 1, i32 2)
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define amdgpu_kernel void @writelane(i32 addrspace(1)* %out) #0 {
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%tmp0 = call i32 @llvm.amdgcn.writelane(i32 0, i32 1, i32 2)
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store i32 %tmp0, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.ds.swizzle(i32, i32) #1
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declare i32 @llvm.amdgcn.permlane16(i32, i32, i32, i32, i1, i1) #1
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declare i32 @llvm.amdgcn.permlanex16(i32, i32, i32, i32, i1, i1) #1
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declare i32 @llvm.amdgcn.mov.dpp.i32(i32, i32, i32, i32, i1) #1
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declare i32 @llvm.amdgcn.mov.dpp8.i32(i32, i32) #1
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declare i32 @llvm.amdgcn.update.dpp.i32(i32, i32, i32, i32, i32, i1) #1
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declare i32 @llvm.amdgcn.writelane(i32, i32, i32) #1
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attributes #0 = { nounwind convergent }
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attributes #1 = { nounwind readnone convergent }
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