11bf7da64a
The GPUDivergenceAnalysis is now renamed to just "DivergenceAnalysis" since there is no conflict with LegacyDivergenceAnalysis. In the legacy PM, this analysis can only be used through the legacy DA serving as a wrapper. It is now made available as a pass in the new PM, and has no relation with the legacy DA. The new DA currently cannot handle irreducible control flow; its presence can cause the analysis to run indefinitely. The analysis is now modified to detect this and report all instructions in the function as divergent. This is super conservative, but allows the analysis to be used without hanging the compiler. Reviewed By: aeubanks Differential Revision: https://reviews.llvm.org/D96615
156 lines
4.2 KiB
LLVM
156 lines
4.2 KiB
LLVM
; RUN: opt -mtriple amdgcn-unknown-amdhsa -enable-new-pm=0 -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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; RUN: opt -mtriple amdgcn-unknown-amdhsa -passes='print<divergence>' -disable-output %s 2>&1 | FileCheck %s
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; temporal-divergent use of value carried by divergent loop
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define amdgpu_kernel void @temporal_diverge(i32 %n, i32 %a, i32 %b) #0 {
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; CHECK-LABEL: Divergence Analysis' for function 'temporal_diverge':
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; CHECK-NOT: DIVERGENT: %uni.
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; CHECK-NOT: DIVERGENT: br i1 %uni.
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%uni.cond = icmp slt i32 %a, 0
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br label %H
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H:
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%uni.merge.h = phi i32 [ 0, %entry ], [ %uni.inc, %H ]
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%uni.inc = add i32 %uni.merge.h, 1
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%div.exitx = icmp slt i32 %tid, 0
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br i1 %div.exitx, label %X, label %H ; divergent branch
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; CHECK: DIVERGENT: %div.exitx =
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; CHECK: DIVERGENT: br i1 %div.exitx,
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X:
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%div.user = add i32 %uni.inc, 5
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ret void
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}
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; temporal-divergent use of value carried by divergent loop inside a top-level loop
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define amdgpu_kernel void @temporal_diverge_inloop(i32 %n, i32 %a, i32 %b) #0 {
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; CHECK-LABEL: Divergence Analysis' for function 'temporal_diverge_inloop':
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; CHECK-NOT: DIVERGENT: %uni.
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; CHECK-NOT: DIVERGENT: br i1 %uni.
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%uni.cond = icmp slt i32 %a, 0
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br label %G
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G:
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br label %H
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H:
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%uni.merge.h = phi i32 [ 0, %G ], [ %uni.inc, %H ]
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%uni.inc = add i32 %uni.merge.h, 1
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%div.exitx = icmp slt i32 %tid, 0
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br i1 %div.exitx, label %X, label %H ; divergent branch
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; CHECK: DIVERGENT: %div.exitx =
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; CHECK: DIVERGENT: br i1 %div.exitx,
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X:
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%div.user = add i32 %uni.inc, 5
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br i1 %uni.cond, label %G, label %Y
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Y:
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%div.alsouser = add i32 %uni.inc, 5
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ret void
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}
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; temporal-uniform use of a valud, definition and users are carried by a surrounding divergent loop
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define amdgpu_kernel void @temporal_uniform_indivloop(i32 %n, i32 %a, i32 %b) #0 {
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; CHECK-LABEL: Divergence Analysis' for function 'temporal_uniform_indivloop':
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; CHECK-NOT: DIVERGENT: %uni.
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; CHECK-NOT: DIVERGENT: br i1 %uni.
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%uni.cond = icmp slt i32 %a, 0
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br label %G
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G:
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br label %H
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H:
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%uni.merge.h = phi i32 [ 0, %G ], [ %uni.inc, %H ]
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%uni.inc = add i32 %uni.merge.h, 1
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br i1 %uni.cond, label %X, label %H ; divergent branch
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X:
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%uni.user = add i32 %uni.inc, 5
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%div.exity = icmp slt i32 %tid, 0
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; CHECK: DIVERGENT: %div.exity =
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br i1 %div.exity, label %G, label %Y
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; CHECK: DIVERGENT: br i1 %div.exity,
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Y:
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%div.alsouser = add i32 %uni.inc, 5
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ret void
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}
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; temporal-divergent use of value carried by divergent loop, user is inside sibling loop
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define amdgpu_kernel void @temporal_diverge_loopuser(i32 %n, i32 %a, i32 %b) #0 {
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; CHECK-LABEL: Divergence Analysis' for function 'temporal_diverge_loopuser':
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; CHECK-NOT: DIVERGENT: %uni.
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; CHECK-NOT: DIVERGENT: br i1 %uni.
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%uni.cond = icmp slt i32 %a, 0
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br label %H
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H:
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%uni.merge.h = phi i32 [ 0, %entry ], [ %uni.inc, %H ]
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%uni.inc = add i32 %uni.merge.h, 1
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%div.exitx = icmp slt i32 %tid, 0
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br i1 %div.exitx, label %X, label %H ; divergent branch
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; CHECK: DIVERGENT: %div.exitx =
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; CHECK: DIVERGENT: br i1 %div.exitx,
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X:
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br label %G
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G:
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%div.user = add i32 %uni.inc, 5
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br i1 %uni.cond, label %G, label %Y
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Y:
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ret void
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}
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; temporal-divergent use of value carried by divergent loop, user is inside sibling loop, defs and use are carried by a uniform loop
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define amdgpu_kernel void @temporal_diverge_loopuser_nested(i32 %n, i32 %a, i32 %b) #0 {
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; CHECK-LABEL: Divergence Analysis' for function 'temporal_diverge_loopuser_nested':
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; CHECK-NOT: DIVERGENT: %uni.
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; CHECK-NOT: DIVERGENT: br i1 %uni.
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entry:
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%uni.cond = icmp slt i32 %a, 0
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br label %H
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H:
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%uni.merge.h = phi i32 [ 0, %entry ], [ %uni.inc, %H ]
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%uni.inc = add i32 %uni.merge.h, 1
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%div.exitx = icmp slt i32 %tid, 0
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br i1 %div.exitx, label %X, label %H ; divergent branch
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; CHECK: DIVERGENT: %div.exitx =
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; CHECK: DIVERGENT: br i1 %div.exitx,
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X:
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br label %G
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G:
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%div.user = add i32 %uni.inc, 5
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br i1 %uni.cond, label %G, label %Y
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Y:
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = { nounwind readnone }
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