0d0fce42b0
This was dropping the invariant metadata on dead argument loads, so they weren't deleted. Atomics still need to be fixed the same way. Also, apparently store was never preserving dereferencable which should also be fixed.
51 lines
2.3 KiB
LLVM
51 lines
2.3 KiB
LLVM
; RUN: llc -O0 -stop-before=irtranslator -global-isel %s -o - | FileCheck %s
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; RUN: llc -O0 -stop-after=irtranslator -verify-machineinstrs -global-isel %s -o - | FileCheck --check-prefixes CHECK,CHECK-MIR %s
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; Check that when using GlobalISel, the StackProtector pass currently inserts
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; both prologue and epilogue instrumentation because GlobalISel does not have
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; the same epilogue insertion/optimization as SelectionDAG.
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target triple = "aarch64-none-unknown-eabi"
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define void @foo() ssp {
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; CHECK-LABEL: entry:
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; CHECK-NEXT: %StackGuardSlot = alloca i8*
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; CHECK-NEXT: %0 = call i8* @llvm.stackguard()
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; CHECK-NEXT: call void @llvm.stackprotector(i8* %0, i8** %StackGuardSlot)
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; CHECK-NEXT: %buf = alloca [8 x i8], align 1
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; CHECK-NEXT: %1 = call i8* @llvm.stackguard()
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; CHECK-NEXT: %2 = load volatile i8*, i8** %StackGuardSlot
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; CHECK-NEXT: %3 = icmp eq i8* %1, %2
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; CHECK-NEXT: br i1 %3, label %SP_return, label %CallStackCheckFailBlk, !prof !0
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;
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; CHECK: SP_return:
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; CHECK-NEXT: ret void
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;
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; CHECK: CallStackCheckFailBlk:
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; CHECK-NEXT: call void @__stack_chk_fail()
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; CHECK-NEXT: unreachable
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; CHECK-MIR: bb.1.entry:
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; CHECK-MIR: %0:_(p0) = G_FRAME_INDEX %stack.0.StackGuardSlot
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; CHECK-MIR-NEXT: %1:gpr64sp(p0) = LOAD_STACK_GUARD :: (dereferenceable invariant load 8 from @__stack_chk_guard)
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; CHECK-MIR-NEXT: %2:gpr64sp(p0) = LOAD_STACK_GUARD :: (dereferenceable invariant load 8 from @__stack_chk_guard)
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; CHECK-MIR-NEXT: G_STORE %2(p0), %0(p0) :: (volatile store 8 into %stack.0.StackGuardSlot)
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; CHECK-MIR-NEXT: %3:_(p0) = G_FRAME_INDEX %stack.1.buf
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; CHECK-MIR-NEXT: %4:gpr64sp(p0) = LOAD_STACK_GUARD :: (dereferenceable invariant load 8 from @__stack_chk_guard)
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; CHECK-MIR-NEXT: %5:_(p0) = G_LOAD %0(p0) :: (volatile dereferenceable load 8 from %ir.StackGuardSlot)
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; CHECK-MIR-NEXT: %6:_(s1) = G_ICMP intpred(eq), %4(p0), %5
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; CHECK-MIR-NEXT: G_BRCOND %6(s1), %bb.2
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; CHECK-MIR-NEXT: G_BR %bb.3
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;
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; CHECK-MIR: bb.2.SP_return:
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; CHECK-MIR-NEXT: RET_ReallyLR
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;
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; CHECK-MIR: bb.3.CallStackCheckFailBlk:
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; CHECK-MIR-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
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; CHECK-MIR-NEXT: BL @__stack_chk_fail, csr_aarch64_aapcs, implicit-def $lr, implicit $sp
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; CHECK-MIR-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
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entry:
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%buf = alloca [8 x i8], align 1
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ret void
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}
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