7080ffa21a
Reuse the logic for INSERT_SUBREG to also import SUBREG_TO_REG patterns. - Split `inferSuperRegisterClass` into two functions, one which tries to use an existing TreePatternNode (`inferSuperRegisterClassForNode`), and one that doesn't. SUBREG_TO_REG doesn't have a node to leverage, which is the cause for the split. - Rename GlobalISelEmitterInsertSubreg.td to GlobalISelEmitterSubreg.td and update it. - Update impacted tests in the AArch64 and X86 backends. This is kind of a hit/miss for code size improvements/regressions. E.g. in add-ext.ll, we now get some identity copies. This isn't really anything the importer can handle, since it's caused by a later pass introducing the copy for the sake of correctness. Differential Revision: https://reviews.llvm.org/D66769 llvm-svn: 370254
55 lines
1.8 KiB
YAML
55 lines
1.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -mtriple=aarch64-- -mattr=+lse -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
|
|
--- |
|
|
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
|
|
|
define void @cmpxchg_i32(i64* %addr) { ret void }
|
|
define void @cmpxchg_i64(i64* %addr) { ret void }
|
|
...
|
|
|
|
---
|
|
name: cmpxchg_i32
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
|
|
; CHECK-LABEL: name: cmpxchg_i32
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $wzr
|
|
; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
|
|
; CHECK: [[CASW:%[0-9]+]]:gpr32 = CASW [[COPY1]], [[MOVi32imm]], [[COPY]] :: (load store monotonic 4 on %ir.addr)
|
|
; CHECK: $w0 = COPY [[CASW]]
|
|
%0:gpr(p0) = COPY $x0
|
|
%1:gpr(s32) = G_CONSTANT i32 0
|
|
%2:gpr(s32) = G_CONSTANT i32 1
|
|
%3:gpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 4 on %ir.addr)
|
|
$w0 = COPY %3(s32)
|
|
...
|
|
|
|
---
|
|
name: cmpxchg_i64
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $x0
|
|
|
|
; CHECK-LABEL: name: cmpxchg_i64
|
|
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
|
|
; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
|
|
; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
|
|
; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32
|
|
; CHECK: [[CASX:%[0-9]+]]:gpr64 = CASX [[COPY1]], [[SUBREG_TO_REG]], [[COPY]] :: (load store monotonic 8 on %ir.addr)
|
|
; CHECK: $x0 = COPY [[CASX]]
|
|
%0:gpr(p0) = COPY $x0
|
|
%1:gpr(s64) = G_CONSTANT i64 0
|
|
%2:gpr(s64) = G_CONSTANT i64 1
|
|
%3:gpr(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr)
|
|
$x0 = COPY %3(s64)
|
|
...
|