ca23b2c8ed
This patch adjusts the placement of the bundle unpacking to just before code emission. In particular, this means bundle unpacking happens AFTER the machine outliner. With the previous position, the machine outliner may outline parts of a bundle, which breaks them up. This is an issue for BLR_RVMARKER handling, as illustrated by the rvmarker-pseudo-expansion-and-outlining.mir test case. The machine outliner should not break up the bundles created during pseudo expansion. This should fix PR49082. Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D96294
79 lines
3.5 KiB
LLVM
79 lines
3.5 KiB
LLVM
; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
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; RUN: grep -v "Verify generated machine code" | FileCheck %s
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; REQUIRES: asserts
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; CHECK-LABEL: Pass Arguments:
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; CHECK-NEXT: Target Library Information
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; CHECK-NEXT: Target Pass Configuration
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; CHECK-NEXT: Machine Module Information
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; CHECK-NEXT: Target Transform Information
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; CHECK-NEXT: Create Garbage Collector Module Metadata
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; CHECK-NEXT: Assumption Cache Tracker
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; CHECK-NEXT: Profile summary info
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; CHECK-NEXT: Machine Branch Probability Analysis
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; CHECK-NEXT: ModulePass Manager
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; CHECK-NEXT: Pre-ISel Intrinsic Lowering
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Expand Atomic instructions
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Lower Garbage Collection Instructions
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; CHECK-NEXT: Shadow Stack GC Lowering
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; CHECK-NEXT: Lower constant intrinsics
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; CHECK-NEXT: Remove unreachable blocks from the CFG
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; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)
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; CHECK-NEXT: Scalarize Masked Memory Intrinsics
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; CHECK-NEXT: Expand reduction intrinsics
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; CHECK-NEXT: AArch64 Stack Tagging
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; CHECK-NEXT: Rewrite Symbols
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Exception handling preparation
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; CHECK-NEXT: Safe Stack instrumentation pass
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; CHECK-NEXT: Insert stack protectors
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Analysis containing CSE Info
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; CHECK-NEXT: IRTranslator
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; CHECK-NEXT: Analysis for ComputingKnownBits
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; CHECK-NEXT: Analysis containing CSE Info
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; CHECK-NEXT: AArch64PreLegalizerCombiner
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; CHECK-NEXT: Legalizer
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; CHECK-NEXT: AArch64PostLegalizerLowering
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; CHECK-NEXT: RegBankSelect
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; CHECK-NEXT: Localizer
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; CHECK-NEXT: Analysis for ComputingKnownBits
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; CHECK-NEXT: InstructionSelect
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; CHECK-NEXT: ResetMachineFunction
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; CHECK-NEXT: AArch64 Instruction Selection
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; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
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; CHECK-NEXT: Local Stack Slot Allocation
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
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; CHECK-NEXT: Post-RA pseudo instruction expansion pass
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; CHECK-NEXT: AArch64 pseudo instruction expansion pass
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; CHECK-NEXT: AArch64 speculation hardening pass
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; CHECK-NEXT: AArch64 Indirect Thunks
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; CHECK-NEXT: AArch64 sls hardening pass
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; CHECK-NEXT: Analyze Machine Code For Garbage Collection
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; CHECK-NEXT: Insert fentry calls
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; CHECK-NEXT: Insert XRay ops
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; CHECK-NEXT: Implement the 'patchable-function' attribute
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; CHECK-NEXT: AArch64 Branch Targets
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; CHECK-NEXT: Branch relaxation pass
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; CHECK-NEXT: Contiguously Lay Out Funclets
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; CHECK-NEXT: StackMap Liveness Analysis
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; CHECK-NEXT: Live DEBUG_VALUE analysis
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; CHECK-NEXT: Unpack machine instruction bundles
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: AArch64 Assembly Printer
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; CHECK-NEXT: Free MachineFunction
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define void @f() {
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ret void
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}
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