2291bd137d
Support for XNACK and SRAMECC is not static on some GPUs. We must be able to differentiate between different scenarios for these dynamic subtarget features. The possible settings are: - Unsupported: The GPU has no support for XNACK/SRAMECC. - Any: Preference is unspecified. Use conservative settings that can run anywhere. - Off: Request support for XNACK/SRAMECC Off - On: Request support for XNACK/SRAMECC On GCNSubtarget will track the four options based on the following criteria. If the subtarget does not support XNACK/SRAMECC we say the setting is "Unsupported". If no subtarget features for XNACK/SRAMECC are requested we must support "Any" mode. If the subtarget features XNACK/SRAMECC exist in the feature string when initializing the subtarget, the settings are "On/Off". The defaults are updated to be conservatively correct, meaning if no setting for XNACK or SRAMECC is explicitly requested, defaults will be used which generate code that can be run anywhere. This corresponds to the "Any" setting. Differential Revision: https://reviews.llvm.org/D85882
78 lines
4.0 KiB
LLVM
78 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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define amdgpu_kernel void @v_insert_v64i32_37(<64 x i32> addrspace(1)* %ptr.in, <64 x i32> addrspace(1)* %ptr.out) #0 {
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; GCN-LABEL: v_insert_v64i32_37:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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; GCN-NEXT: v_lshlrev_b32_e32 v64, 8, v0
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; GCN-NEXT: s_movk_i32 s4, 0x80
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; GCN-NEXT: s_mov_b32 s5, 0
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; GCN-NEXT: s_waitcnt lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, s0
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; GCN-NEXT: v_mov_b32_e32 v1, s1
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; GCN-NEXT: v_add_co_u32_e32 v4, vcc, v0, v64
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; GCN-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v1, vcc
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; GCN-NEXT: v_add_co_u32_e32 v0, vcc, 64, v4
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; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v5, vcc
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; GCN-NEXT: global_load_dwordx4 v[32:35], v[0:1], off offset:16
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; GCN-NEXT: global_load_dwordx4 v[36:39], v[0:1], off offset:32
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; GCN-NEXT: global_load_dwordx4 v[40:43], v[0:1], off offset:48
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; GCN-NEXT: v_mov_b32_e32 v0, s4
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; GCN-NEXT: v_mov_b32_e32 v1, s5
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; GCN-NEXT: v_add_co_u32_e32 v0, vcc, v4, v0
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; GCN-NEXT: s_movk_i32 s4, 0xc0
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; GCN-NEXT: v_mov_b32_e32 v2, s4
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; GCN-NEXT: v_addc_co_u32_e32 v1, vcc, v5, v1, vcc
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; GCN-NEXT: v_mov_b32_e32 v3, s5
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; GCN-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
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; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
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; GCN-NEXT: global_load_dwordx4 v[44:47], v64, s[0:1]
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; GCN-NEXT: global_load_dwordx4 v[48:51], v64, s[0:1] offset:16
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; GCN-NEXT: global_load_dwordx4 v[52:55], v64, s[0:1] offset:32
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; GCN-NEXT: global_load_dwordx4 v[56:59], v64, s[0:1] offset:48
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; GCN-NEXT: global_load_dwordx4 v[60:63], v64, s[0:1] offset:64
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; GCN-NEXT: global_load_dwordx4 v[4:7], v[0:1], off offset:16
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; GCN-NEXT: global_load_dwordx4 v[8:11], v[0:1], off offset:32
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; GCN-NEXT: global_load_dwordx4 v[12:15], v[0:1], off offset:48
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; GCN-NEXT: global_load_dwordx4 v[20:23], v[2:3], off offset:16
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; GCN-NEXT: global_load_dwordx4 v[24:27], v[2:3], off offset:32
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; GCN-NEXT: global_load_dwordx4 v[28:31], v[2:3], off offset:48
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; GCN-NEXT: s_nop 0
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; GCN-NEXT: global_load_dwordx4 v[0:3], v64, s[0:1] offset:128
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; GCN-NEXT: global_load_dwordx4 v[16:19], v64, s[0:1] offset:192
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; GCN-NEXT: s_waitcnt vmcnt(7)
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; GCN-NEXT: v_mov_b32_e32 v5, 0x3e7
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; GCN-NEXT: s_waitcnt vmcnt(1)
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; GCN-NEXT: global_store_dwordx4 v64, v[0:3], s[2:3] offset:128
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; GCN-NEXT: global_store_dwordx4 v64, v[4:7], s[2:3] offset:144
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; GCN-NEXT: global_store_dwordx4 v64, v[8:11], s[2:3] offset:160
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; GCN-NEXT: global_store_dwordx4 v64, v[12:15], s[2:3] offset:176
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; GCN-NEXT: s_waitcnt vmcnt(4)
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; GCN-NEXT: global_store_dwordx4 v64, v[16:19], s[2:3] offset:192
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; GCN-NEXT: global_store_dwordx4 v64, v[20:23], s[2:3] offset:208
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; GCN-NEXT: global_store_dwordx4 v64, v[24:27], s[2:3] offset:224
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; GCN-NEXT: global_store_dwordx4 v64, v[44:47], s[2:3]
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; GCN-NEXT: global_store_dwordx4 v64, v[48:51], s[2:3] offset:16
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; GCN-NEXT: global_store_dwordx4 v64, v[52:55], s[2:3] offset:32
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; GCN-NEXT: global_store_dwordx4 v64, v[56:59], s[2:3] offset:48
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; GCN-NEXT: global_store_dwordx4 v64, v[60:63], s[2:3] offset:64
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; GCN-NEXT: global_store_dwordx4 v64, v[28:31], s[2:3] offset:240
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; GCN-NEXT: global_store_dwordx4 v64, v[32:35], s[2:3] offset:80
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; GCN-NEXT: global_store_dwordx4 v64, v[36:39], s[2:3] offset:96
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; GCN-NEXT: global_store_dwordx4 v64, v[40:43], s[2:3] offset:112
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; GCN-NEXT: s_endpgm
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.in = getelementptr <64 x i32>, <64 x i32> addrspace(1)* %ptr.in, i32 %id
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%vec = load <64 x i32>, <64 x i32> addrspace(1)* %gep.in
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%insert = insertelement <64 x i32> %vec, i32 999, i32 37
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%gep.out = getelementptr <64 x i32>, <64 x i32> addrspace(1)* %ptr.out, i32 %id
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store <64 x i32> %insert, <64 x i32> addrspace(1)* %gep.out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #1
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attributes #0 = { "amdgpu-waves-per-eu"="1,10" }
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attributes #1 = { nounwind readnone speculatable willreturn }
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