e2303a448e
Fast register allocator skips bundled MIs, as the main assignment loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator) This was causing SIInsertWaitcnts to crash which expects all instructions to have registers assigned. This patch makes sure to set everything inside bundle to the same assignments done on BUNDLE header. Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D90369
20 lines
809 B
LLVM
20 lines
809 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -stop-after=postrapseudos -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=MIR %s
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; MIR-LABEL: name: gws_barrier_offset0{{$}}
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; MIR: BUNDLE implicit{{( killed)?( renamable)?}} $vgpr0, implicit $m0, implicit $exec {
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; MIR-NEXT: DS_GWS_BARRIER renamable $vgpr0, 0, implicit $m0, implicit $exec :: (load 4 from custom "GWSResource")
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; MIR-NEXT: S_WAITCNT 0
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; MIR-NEXT: }
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define amdgpu_kernel void @gws_barrier_offset0(i32 %val) #0 {
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call void @llvm.amdgcn.ds.gws.barrier(i32 %val, i32 0)
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ret void
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}
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declare void @llvm.amdgcn.ds.gws.barrier(i32, i32) #1
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attributes #0 = { nounwind }
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attributes #1 = { convergent inaccessiblememonly nounwind }
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