f333736757
These VGPRs should be reserved and therefore do not need "correct" liveness. They should not have undef uses, which can still cause issues.
53 lines
1.8 KiB
YAML
53 lines
1.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s
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#
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# Check for liveness errors when spilling partially defined super registers.
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---
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name: sgpr_spill_s64_undef_high32
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 8, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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liveins: $sgpr4
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; CHECK-LABEL: name: sgpr_spill_s64_undef_high32
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; CHECK: liveins: $sgpr4, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 $sgpr4, 0, $vgpr0, implicit-def $sgpr4_sgpr5, implicit $sgpr4_sgpr5
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; CHECK: $vgpr0 = V_WRITELANE_B32 $sgpr5, 1, $vgpr0, implicit $sgpr4_sgpr5
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SI_SPILL_S64_SAVE renamable $sgpr4_sgpr5, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store 8 into %stack.0, align 4, addrspace 5)
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...
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---
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name: sgpr_spill_s64_undef_low32
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tracksRegLiveness: true
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machineFunctionInfo:
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isEntryFunction: true
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hasSpilledSGPRs: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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stack:
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- { id: 0, type: spill-slot, size: 8, alignment: 4, stack-id: sgpr-spill }
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body: |
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bb.0:
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liveins: $sgpr5
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; CHECK-LABEL: name: sgpr_spill_s64_undef_low32
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; CHECK: liveins: $sgpr5, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 $sgpr4, 0, $vgpr0, implicit-def $sgpr4_sgpr5, implicit $sgpr4_sgpr5
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; CHECK: $vgpr0 = V_WRITELANE_B32 $sgpr5, 1, $vgpr0, implicit $sgpr4_sgpr5
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SI_SPILL_S64_SAVE renamable $sgpr4_sgpr5, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr32 :: (store 8 into %stack.0, align 4, addrspace 5)
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...
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