1f559353a7
Introduce IntImmLeaf version of PatLeaf immZExt16 for 32-bit immediates. Change immZExt16 with imm32ZExt16 for andi, ori and xori. This keeps same behavior for SDAG and allows for GlobalISel selectImpl to select 'G_CONSTANT imm' + G_AND, G_OR, G_XOR into ANDi, ORi, XORi, respectively, when 32-bit imm satisfies imm32ZExt16 predicate: zero extending 16 low bits of imm is equal to imm. Large number of test changes comes from zero extending of small types which is transformed into 'and' with bitmask in legalizer. Differential Revision:https://reviews.llvm.org/D70185
73 lines
2.5 KiB
YAML
73 lines
2.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define void @mul_i32(i32 %x, i32 %y) {entry: ret void}
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define void @umul_with_overflow(i32 %lhs, i32 %rhs, i32* %pmul, i1* %pcarry_flag) { ret void }
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...
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---
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name: mul_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: mul_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0
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; MIPS32: $v0 = COPY [[MUL]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = G_MUL %0, %1
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$v0 = COPY %2(s32)
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RetRA implicit $v0
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...
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---
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name: umul_with_overflow
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1 (%ir-block.0):
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liveins: $a0, $a1, $a2, $a3
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; MIPS32-LABEL: name: umul_with_overflow
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; MIPS32: liveins: $a0, $a1, $a2, $a3
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
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; MIPS32: [[COPY3:%[0-9]+]]:gpr32 = COPY $a3
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; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0
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; MIPS32: [[PseudoMULTu:%[0-9]+]]:acc64 = PseudoMULTu [[COPY]], [[COPY1]]
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; MIPS32: [[PseudoMFHI:%[0-9]+]]:gpr32 = PseudoMFHI [[PseudoMULTu]]
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[PseudoMFHI]]
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; MIPS32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[SLTu]], 1
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; MIPS32: SB [[ANDi]], [[COPY3]], 0 :: (store 1 into %ir.pcarry_flag)
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; MIPS32: SW [[MUL]], [[COPY2]], 0 :: (store 4 into %ir.pmul)
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; MIPS32: RetRA
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(p0) = COPY $a2
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%3:gprb(p0) = COPY $a3
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%4:gprb(s32) = G_MUL %0, %1
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%7:gprb(s32) = G_UMULH %0, %1
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%8:gprb(s32) = G_CONSTANT i32 0
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%9:gprb(s32) = G_ICMP intpred(ne), %7(s32), %8
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%10:gprb(s32) = G_CONSTANT i32 1
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%11:gprb(s32) = COPY %9(s32)
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%6:gprb(s32) = G_AND %11, %10
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G_STORE %6(s32), %3(p0) :: (store 1 into %ir.pcarry_flag)
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G_STORE %4(s32), %2(p0) :: (store 4 into %ir.pmul)
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RetRA
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...
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