6da7dbb806
https://reviews.llvm.org/D70922 This adds a hook to allow targets to define exactly what extension operation should be performed for widening constants. This handles cases like widening i1 true which would end up becoming -1 which affects code quality during combines. Additionally, in order to stay consistent with how DAG is promoting constants, we now signextend for byte sized types and zero extend otherwise (by default). Targets can of course override this if necessary.
133 lines
2.9 KiB
LLVM
133 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
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define i64 @any_i64() {
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; MIPS32-LABEL: any_i64:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: ori $2, $zero, 0
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; MIPS32-NEXT: lui $3, 32768
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i64 -9223372036854775808
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}
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define i32 @any_i32() {
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; MIPS32-LABEL: any_i32:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: lui $2, 32768
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i32 -2147483648
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}
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define signext i16 @signed_i16() {
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; MIPS32-LABEL: signed_i16:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $1, $zero, 32768
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; MIPS32-NEXT: sll $1, $1, 16
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; MIPS32-NEXT: sra $2, $1, 16
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i16 -32768
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}
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define signext i8 @signed_i8() {
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; MIPS32-LABEL: signed_i8:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $1, $zero, 65408
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; MIPS32-NEXT: sll $1, $1, 24
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; MIPS32-NEXT: sra $2, $1, 24
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i8 -128
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}
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define zeroext i16 @unsigned_i16() {
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; MIPS32-LABEL: unsigned_i16:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $1, $zero, 32768
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; MIPS32-NEXT: andi $2, $1, 65535
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i16 -32768
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}
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define zeroext i8 @unsigned_i8() {
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; MIPS32-LABEL: unsigned_i8:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $1, $zero, 65408
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; MIPS32-NEXT: andi $2, $1, 255
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i8 -128
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}
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define zeroext i1 @i1_true() {
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; MIPS32-LABEL: i1_true:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: ori $1, $zero, 1
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; MIPS32-NEXT: andi $2, $1, 1
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i1 true
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}
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define zeroext i1 @i1_false() {
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; MIPS32-LABEL: i1_false:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: ori $1, $zero, 0
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; MIPS32-NEXT: andi $2, $1, 1
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i1 false
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}
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define i32 @_0xABCD0000() {
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; MIPS32-LABEL: _0xABCD0000:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: lui $2, 43981
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i32 -1412628480
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}
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define i32 @_0x00008000() {
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; MIPS32-LABEL: _0x00008000:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: ori $2, $zero, 32768
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i32 32768
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}
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define i32 @_0xFFFFFFF6() {
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; MIPS32-LABEL: _0xFFFFFFF6:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: addiu $2, $zero, 65526
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i32 -10
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}
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define i32 @_0x0A0B0C0D() {
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; MIPS32-LABEL: _0x0A0B0C0D:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: lui $1, 2571
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; MIPS32-NEXT: ori $2, $1, 3085
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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ret i32 168496141
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}
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