417dd67825
selectImpl is able to select G_FSQRT when we set bank for vector operands to fprb. Add detailed tests. Note: G_FSQRT is generated from llvm-ir intrinsics llvm.sqrt.*, and at the moment MIPS is not able to generate this intrinsic for vector type (some targets generate vector llvm.sqrt.* from calls to a builtin function). __builtin_msa_fsqrt_<format> will be transformed into G_FSQRT in legalizeIntrinsic and selected in the same way. Differential Revision: https://reviews.llvm.org/D69376
35 lines
1.2 KiB
LLVM
35 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=P5600
|
|
|
|
declare <4 x float> @llvm.sqrt.v4f32(<4 x float> %Val)
|
|
define void @sqrt_v4f32(<4 x float>* %a, <4 x float>* %c) {
|
|
; P5600-LABEL: sqrt_v4f32:
|
|
; P5600: # %bb.0: # %entry
|
|
; P5600-NEXT: ld.w $w0, 0($4)
|
|
; P5600-NEXT: fsqrt.w $w0, $w0
|
|
; P5600-NEXT: st.w $w0, 0($5)
|
|
; P5600-NEXT: jr $ra
|
|
; P5600-NEXT: nop
|
|
entry:
|
|
%0 = load <4 x float>, <4 x float>* %a, align 16
|
|
%sqrt = call <4 x float> @llvm.sqrt.v4f32 (<4 x float> %0)
|
|
store <4 x float> %sqrt, <4 x float>* %c, align 16
|
|
ret void
|
|
}
|
|
|
|
declare <2 x double> @llvm.sqrt.v2f64(<2 x double> %Val)
|
|
define void @sqrt_v2f64(<2 x double>* %a, <2 x double>* %c) {
|
|
; P5600-LABEL: sqrt_v2f64:
|
|
; P5600: # %bb.0: # %entry
|
|
; P5600-NEXT: ld.d $w0, 0($4)
|
|
; P5600-NEXT: fsqrt.d $w0, $w0
|
|
; P5600-NEXT: st.d $w0, 0($5)
|
|
; P5600-NEXT: jr $ra
|
|
; P5600-NEXT: nop
|
|
entry:
|
|
%0 = load <2 x double>, <2 x double>* %a, align 16
|
|
%sqrt = call <2 x double> @llvm.sqrt.v2f64 (<2 x double> %0)
|
|
store <2 x double> %sqrt, <2 x double>* %c, align 16
|
|
ret void
|
|
}
|