63baeec66e
Use vle1.v/vse1.v to load/store vector mask types. Differential Revision: https://reviews.llvm.org/D93364
90 lines
3.0 KiB
LLVM
90 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple riscv32 -mattr=+experimental-v %s -o - \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: llc -mtriple riscv64 -mattr=+experimental-v %s -o - \
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; RUN: -verify-machineinstrs | FileCheck %s
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define void @test_load_mask_64(<vscale x 64 x i1>* %pa, <vscale x 64 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,m8,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 64 x i1>, <vscale x 64 x i1>* %pa
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store <vscale x 64 x i1> %a, <vscale x 64 x i1>* %pb
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ret void
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}
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define void @test_load_mask_32(<vscale x 32 x i1>* %pa, <vscale x 32 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,m4,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 32 x i1>, <vscale x 32 x i1>* %pa
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store <vscale x 32 x i1> %a, <vscale x 32 x i1>* %pb
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ret void
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}
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define void @test_load_mask_16(<vscale x 16 x i1>* %pa, <vscale x 16 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,m2,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 16 x i1>, <vscale x 16 x i1>* %pa
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store <vscale x 16 x i1> %a, <vscale x 16 x i1>* %pb
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ret void
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}
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define void @test_load_mask_8(<vscale x 8 x i1>* %pa, <vscale x 8 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,m1,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 8 x i1>, <vscale x 8 x i1>* %pa
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store <vscale x 8 x i1> %a, <vscale x 8 x i1>* %pb
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ret void
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}
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define void @test_load_mask_4(<vscale x 4 x i1>* %pa, <vscale x 4 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,mf2,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 4 x i1>, <vscale x 4 x i1>* %pa
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store <vscale x 4 x i1> %a, <vscale x 4 x i1>* %pb
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ret void
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}
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define void @test_load_mask_2(<vscale x 2 x i1>* %pa, <vscale x 2 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,mf4,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 2 x i1>, <vscale x 2 x i1>* %pa
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store <vscale x 2 x i1> %a, <vscale x 2 x i1>* %pb
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ret void
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}
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define void @test_load_mask_1(<vscale x 1 x i1>* %pa, <vscale x 1 x i1>* %pb) {
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; CHECK-LABEL: test_load_mask_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a2, zero, e8,mf8,ta,mu
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; CHECK-NEXT: vle1.v v25, (a0)
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; CHECK-NEXT: vse1.v v25, (a1)
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; CHECK-NEXT: ret
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%a = load <vscale x 1 x i1>, <vscale x 1 x i1>* %pa
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store <vscale x 1 x i1> %a, <vscale x 1 x i1>* %pb
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ret void
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}
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