06c192d454
Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.
51 lines
1.3 KiB
LLVM
51 lines
1.3 KiB
LLVM
; XFAIL: *
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; RUN: opt -S -basic-aa -dse < %s | FileCheck %s
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; We DSE stack alloc'ed and byval locations, in the presence of fences.
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; Fence does not make an otherwise thread local store visible.
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; Right now the DSE in presence of fence is only done in end blocks (with no successors),
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; but the same logic applies to other basic blocks as well.
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; The store to %addr.i can be removed since it is a byval attribute
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define void @test3(i32* byval(i32) %addr.i) {
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; CHECK-LABEL: @test3
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; CHECK-NOT: store
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; CHECK: fence
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; CHECK: ret
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store i32 5, i32* %addr.i, align 4
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fence release
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ret void
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}
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declare void @foo(i8* nocapture %p)
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declare noalias i8* @malloc(i32)
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; DSE of stores in locations allocated through library calls.
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define void @test_nocapture() {
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; CHECK-LABEL: @test_nocapture
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; CHECK: malloc
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; CHECK: foo
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; CHECK-NOT: store
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; CHECK: fence
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%m = call i8* @malloc(i32 24)
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call void @foo(i8* %m)
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store i8 4, i8* %m
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fence release
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ret void
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}
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; This is a full fence, but it does not make a thread local store visible.
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; We can DSE the store in presence of the fence.
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define void @fence_seq_cst() {
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; CHECK-LABEL: @fence_seq_cst
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; CHECK-NEXT: fence seq_cst
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; CHECK-NEXT: ret void
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%P1 = alloca i32
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store i32 0, i32* %P1, align 4
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fence seq_cst
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store i32 4, i32* %P1, align 4
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ret void
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}
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