b3a1d09c1c
Summary: This is the first revision in a series that adds support for declaratively specifying the asm format of an operation. This revision focuses solely on parsing the format. Future revisions will add support for generating the proper parser/printer, as well as transitioning the syntax definition of many existing operations. This was originally proposed here: https://llvm.discourse.group/t/rfc-declarative-op-assembly-format/340 Differential Revision: https://reviews.llvm.org/D73405
29 lines
940 B
C++
29 lines
940 B
C++
//===- OpFormatGen.h - MLIR operation format generator ----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interface for generating parsers and printers from the
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// declarative format.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
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#define MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
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namespace mlir {
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namespace tblgen {
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class OpClass;
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class Operator;
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// Generate the assembly format for the given operator.
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void generateOpFormat(const Operator &constOp, OpClass &opClass);
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} // end namespace tblgen
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} // end namespace mlir
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#endif // MLIR_TOOLS_MLIRTBLGEN_OPFORMATGEN_H_
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