Files
clang-p2996/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-const.mir
David Green a2aa88192f [GlobalISel] Add a update_givaluetracking_test_checks.py script (#140296)
As with the other update scripts this takes the output of
-passes=print<gisel-value-tracking> and inserts the results into an
existing mir file. This means that the input is a lot like
update_analysis_test_checks.py, and the output needs to insert into a
mir file similarly to update_mir_test_checks.py. The code used to do the
inserting has been moved to common, to allow it to be reused. Otherwise
it tries to reuse the existing infrastructure, and
update_givaluetracking_test_checks is kept relatively short.
2025-05-22 09:06:37 +01:00

28 lines
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# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
---
name: Cst
tracksRegLiveness: true
body: |
bb.1:
; CHECK-LABEL: name: @Cst
; CHECK-NEXT: %0:_ KnownBits:00000001 SignBits:7
; CHECK-NEXT: %1:_ KnownBits:00000001 SignBits:7
%0:_(s8) = G_CONSTANT i8 1
%1:_(s8) = COPY %0
...
---
name: CstWithClass
tracksRegLiveness: true
body: |
bb.1:
; We can't analyze %0 due to the lack of an LLT. We will get a default
; constructed KnownBits back. %0 will have the correct size but we will
; not know any further info.
; CHECK-LABEL: name: @CstWithClass
; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
%0:gpr32 = MOVi32imm 1
%1:_(s32) = COPY %0
...